SPECIFICATIONS
Interface timing
1. Data transmission: | |||||
| External supplied |
|
| ||
2. Synchronization: | STROBE | ||||
| pulse | ||||
| Via |
| or BUSY signals | ||
3. Handshaking: | ACKNLG | ||||
4. Logic level: | TTL level | ||||
5. RAM capacity: | 32 Kbytes | ||||
6. Connector: | |||||
| or its equivalent |
The figure below shows the timing for the parallel interface.
Figure 3. Interface timing11