Fairchild AN-7511 manual Use 6-Step Drive For Speed-InvariantTorque

Application Note 7511

Use 6-Step Drive For Speed-InvariantTorque

Figure 10A shows the inverter circuit configured for this example. Diodes D1 through D6 carry the same peak current as the IGTs; consequently, they’re rated to handle peak cur- rents of at least 8.766A. However, they only conduct for a short time (15o to 20o of 180o), so their average-current requirement is relatively small.

External circuitry can control the IGT’s current fall time. Resistor R controls tF1 Figure 10B; there's no way to control tF2, an inherent characteristic of the selected IGT. In this example, a 4.7-kΩgate-to-emitter resistor provides the appropriate fall time. The choice of current-limiting inductor L1 is based on the IGT’s overload-current rating and the action time (the sum of the sensor’s sensing and response time and the IGT’s turn-off time) in fault conditions.

You could use a set of flip flops and a multivibrator to gener- ate the necessary drive pulses and the corresponding 120o× delay between the three phases in Figure 10’s circuit. A volt- age-controlled oscillator serves to change the inverter’s out- put frequency. In this circuit, IGTs Q1, Q3 and Q5 require isolated gate drive; the drive for Q2, Q4 and Q6 can be referred to common. If you use optocouplers for isolation, you’ll need three isolated or bootstrap power supplies (in addition to the 5V and 24V power supplies) to drive the IGTs. Another alternative is to use transformer coupling.

165o Conduction Prevents Shoot-Through

Consider, however, using Figure 11A’s novel, low-cost cir- cuit. It uses a piezo coupler to drive the isolated IGT. As noted, the coupler needs a high-frequency square wave to induce mechanical oscillations in its primary side. The 555 oscillator provides the necessary 108-kHz waveform; its out- put is gated according to the required timing logic and then applied to the piezo coupler’s primary. The coupler’s rectified output drives the IGT’s gate; the 4.7kW gate-to-emitter resis- tor provides a discharge path for CGE during the IGT’s turn- off. The circuit’s logic-timing diagram is shown in Figure 11B.

The piezo coupler’s slow response time Figure 12A contrib- utes approximately 2o to the 15o to 20o turn-on/turn-off delay needed to avoid shoot-through in the complementary pairs. The corresponding collector current is shown in Figure 12B. C1 and its associated circuitry provide the remaining delay as follows:

FIGURE 12A. THE PIEZO COUPLER’S SLOW RESPONSE IS NOT A DISADVANTAGE IN THIS ARTICLE’S CIRCUIT. IN FACT, IT CONTRIBUTES 2o TO THE REQUIRED 15o

TURN-ON/TURN-OFF DELAY.

TRACE	VERTICAL	HORIZONTAL
A	5V/DIV	200∝SEC/DIV
B	5V/DIV	200∝SEC/DIV

FIGURE 12B. THE DRIVEN IGT'S COLLECTOR CURRENT IS SHOWN

TRACE	VERTICAL	HORIZONTAL
A	3A/DIV	200∝SEC/DIV
B	5V/DIV	200∝SEC/DIV

When Q3’s base swings negative, C1 - at this time discharged - turns on Q5. Once C1 is charged, Q5 turns off, allowing a drive pulse to turn the IGT on. When Q7’s base goes to ground, Q4 turns on and discharges C1, initiating the IGT’s turn-off. Figure 13 shows the motor current and corresponding line voltage under light-load Figure 12A and full-load Figure 12B conditions.

©2002 Fairchild Semiconductor Corporation Application Note 7511 Rev. A1