PCB Layout Recommendations
For the best performance, all traces should be as short as possible. To be most effective, the input and output capacitors should be placed close to the device to minimize the effects that parasitic trace inductances may have on normal and short- circuit operation. Using wide traces for IN, OUTs, and GND pins helps minimize parasitic electrical effects and the
Improving Thermal Performance
Improper layout could result in higher junction temperature and triggering the thermal shutdown protection feature. This concern is particularly significant for the FPF2303, where both channels operate in constant current mode in the overload conditions and during fault condition the outputs are shorted, resulting in large voltage drop across switches. In this case, power dissipation of
the switch (PD = (VIN - VOUT) x ILIM(MAX)) could exceed the maximum absolute power dissipation of part.
The following techniques improve the thermal performance of this family of devices. These techniques are listed in order of the significance of impact.
1.Thermal performance of the load switch can be improved by connecting the DAP (Die Attach Pad) of MLP 3x3mm package to the GND plane of the PCB.
2.Embedding two exposed
15mil
25mil
Figure 41. Two Through-Hole Open Vias Embedded
in DAP
3.The IN, OUTs, and GND pins dissipate most of the heat generated during a high load current condition. Figure 42 illustrates a proper layout for devices in MLP 3x3mm packages. IN, OUTs, and GND pins are connected to adequate copper so heat may be transferred as efficiently as possible out of the device. The
Figure 42. Proper Layout of Output and Ground
Copper Area
Switch Limit Current
© 2009 Fairchild Semiconductor Corporation | www.fairchildsemi.com |
FPF2300/02/03 • Rev. 1.1.3 | 15 |