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| MT8222_P1V1 (DDR1) VERSION V1.0 |
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| ( DDR1 WITH TERMINATION ) |
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| D | |
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| GPIO usage |
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| ADIN0 | GPIO Definition | Function define |
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| SCART FS |
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| LVDS out | SFlash |
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| ADIN1 | SCART FS |
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| E2PROM |
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| ADIN2 | 4052 SWITCH |
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| ADIN3 | KEYPAD |
| POWER |
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| Analog AMP | Speaker |
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| ADIN4 | KEYPAD | High = WP disable | DDR1 |
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| DAC | TI3101D (10Wx2) |
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| ADIN5 | HDMI/VGA EDID E2PROM WP |
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| GPIO_20 | Audio MUX |
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| 4558 |
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| Headphone |
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| GPIO_21 | AMP_MUTE CONTROL | High = Mute on | MCU WT6702 |
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| GPIO_22 | GAME |
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| GPIO_23 | GAME |
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| GPIO_24 | GAME |
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| GPIO_25 | GAME |
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| 4052 x 2 |
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| PWM0 | DIMMING CONTROL |
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| PWM1 | Power conversion to 33V |
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| PWM2 | SYSTEM E2PROM WP | High = WP disable |
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| PWM3 | Audio MUX |
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| UP30 | BL ON/OFF CONTROL | Low = Backlight on |
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| HDMIx3 | YPbPr x 2 | Micphone | CVBS x 2 | RF Tuner |
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| UP31 | NORMAL POWER ON/OFF | Low = Normal power on |
| VGA | Scart x 2 | Interface | TDA9885 |
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| UP33 | HMDI 0 HPLUG DETECT |
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| UP34 | HMDI 1 HPLUG DETECT |
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| UP35 | HMDI 2 HPLUG DETECT |
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| GPIO_0 | MICPHOTO RESERVE |
| Power Distribution |
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| GPIO_1 | LVDS RESERVED |
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| GPIO_2 | FCI |
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| GPIO_3 | FCI |
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| GPIO_4 | LVDS POWER ON/OFF | Hi = LVDS power on |
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| GPIO_5 | AMP_SD/FCI |
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| GPIO_6 | SCART1 VIDEO OUTPUT SW/FCI |
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| GPIO_7 | FCI |
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| GPIO_8 | FCI |
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| GPIO_9 | FCI |
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B | GPIO_10 | FCI |
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| GPIO_11 | 4052 SWITCH | Low = HP insert |
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| INT | Audio MUX select bit 0 |
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| SPDIFIN | LVDS RESERVED |
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| AOSDATA0 | USB0 OC TAG |
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| AOLRCK | USB0 PWR ENABLE |
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| AOBCLK | USB1 PWR ENABLE |
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| AOMCLK | USB1 OC TAG |
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A |
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| A |
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| MediaTek Confidential |
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| MediaTek (ShenZhen) Inc. |
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| Title | GPIO/BLOCK |
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| Size | Document Number |
| Jiu.Ni1 of | Rev |
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| C | HISENSE_MT8222_EU Drawn: | 1 | ||
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| Date: | 2008/1/25 | Sheet | 14 | |
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| 5 | 4 |
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