Standard Event Group
The meaning of each bit in the Status Byte is explained in the following table.
Table 2-1. Status Byte Bit Definitions
| Bit | Name | Description |
|
|
|
|
|
|
| 0 |
| Instrument dependent |
|
| 1 |
| Instrument dependent |
|
| 2 |
| Instrument dependent |
|
|
|
|
|
|
| 3 | QUE | Summary bit from Questionable Data |
|
| 4 | MAV | Messages available in Output Queue |
|
| 5 | ESB | Summary bit from Standard Event |
|
| 6 | RQS | Service request |
|
|
|
|
|
|
| 7 | OPR | Summary bit from Standard Operation |
|
|
|
| Status |
|
|
|
|
|
|
|
|
|
|
|
Example commands using the Status Byte and Status Byte enable registers:
*SRE 16 Generate an SRQ interrupt when messages are available.
*SRE? Find out what events are enabled to generate SRQ interrupts.
*STB? Read and clear the Status Byte event register.
The Standard Event status group is frequently used and is one of the simplest. The unique aspect of Standard Event is that you program it using common commands, while you program all other status groups through the STATus subsystem. Standard Event consists of only two registers: the Standard Event event register and the Standard Event enable register. Figure
Figure 2-5. Standard Event Status Group
12 Programming the Status System | Chapter 2 |
