HYUNDAI MicroElectronics GMS90X5XC Series
40 Jan. 2001 Ver 1.0

Figure 7. External Data Memory Read Cycle

Figure 8. External Data Memory Write Cycle

tLHLL
P2.0-P2.7 or A8-A15 from DPH A8-A15 from PCH
ALE
PSEN
PORT 0
PORT 2

RD

tLLWL
DATA IN A0-A7 from PCL INSTR. IN
A0-A7 from
tLLAX2
tAVWL
tAVLL
tAVDV
tRLAZ
tLLDV
tRLRH
tRLDV
tRHDX
tRHDZ
tWHLH
RI or DPL
tLHLL
P2.0-P2.7 or A8-A15 from DPH A8-A15 from PCH
ALE
PSEN
PORT 0
PORT 2

WR

tLLWL
DATA OUT A0-A7 from PCL INSTR. IN
A0-A7 from
tLLAX2
tAVWL
tAVLL
tWLWH
tWHQX
tWHLH
RI or DPL
tQVWX
tQVWH