2.1.3 Copper and CMOS technology

Copper is a superior conductor of electricity, making it possible to shrink electronic devices even further while increasing performance. It has less resistance than aluminum and, therefore, allows designs that transmit electrical signals faster. However, it does not mix as well with silicon, the base material of semiconductor chips. IBM researchers found a way to put a microscopic barrier between the copper and silicon in a way that actually reduced the number of steps needed to complete a chip. With this development, IBM is able to squeeze down the widths of copper wires to the 0.2-micron range from the current 0.35-micron widths

-a reduction far more difficult for aluminum. A single POWER3-II chip contains about 400 meters of copper wiring. This technology, called CMOS 7S, is the first to use copper instead of aluminum to create the circuitry on silicon wafers. Copper wires conduct electricity with about 40 percent less resistance than aluminum. That improves processor performance and reliability while using less power and producing less heat, thus conserving energy for both operations and cooling.

2.1.4Processor deallocation

In general, there are two options available to deallocate a processor within an SMP system, which are described in more detail in the following sections:

1.Processor Boot Time Deconfiguration

2.Processor Run-Time Deconfiguration (Dynamic Processor Deallocation)

The capability of Dynamic Processor Deallocation is only active in systems with more than two processors, because device drivers and kernel extensions, which are common to multi-processor and uniprocessor systems, would change their mode to uniprocessor mode with unpredictable results. Therefore, it could not be used in the Models 6C1 and 6E1.

Processor boot time deconfiguration within an SMP system

Processor boot time deconfiguration within an SMP system is a function implemented in the system and service processor firmware of the Models 6C1 and 6E1 for deallocating a processor from the system configuration at boot time. The objective is to minimize system failure or data integrity exposure due to a faulty processor.

The processor that is deconfigured remain offline for subsequent reboots until the faulty processor hardware is replaced. This function provides the option for a user to manually deconfigure or re-enable a previously deconfigured processor using the Service Processor menu.

Note: Processor cards only can physically be removed when the power is turned off to the entire system.

If the system processor in slot 1 (P1-C1) has been deconfigured by the system, the service processor will prevent the system from booting.

How to disable the second processor manually

A additional processor in Models 6C1 and 6E1 can be disabled only within the Service Processor menus. There is no need to remove them from the system. The cpu_state command, used on the micro-channel SMP servers, is not supported on the PCI-based systems.

To determine if a processor is enabled or disabled, use the following AIX® commands:

￿sar command (requires bos.acct fileset to be installed):

Chapter 2. Architecture and technical overview

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IBM 6C1, 6E1 Copper and Cmos technology, Processor deallocation, Processor boot time deconfiguration within an SMP system
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610, 6C1, 6E1 specifications

IBM 6C1, 6E1, and 610 models are part of IBM's legacy mainframe computing systems, renowned for their reliability, scalability, and security features. These systems have been foundational to managing enterprise-level tasks in various industries, including finance, healthcare, and government sectors.

One of the standout features of the IBM 6C1 is its advanced processing capabilities. Equipped with powerful processors, it enables users to handle heavy workloads while maintaining high performance and low latency. This model integrates IBM's latest microarchitecture technology, allowing for faster data processing and improved efficiency.

The IBM 6E1 model emphasizes enhanced memory and storage capabilities, which are crucial for running large-scale applications. With increased RAM options and high-speed access to storage solutions, users can expect improved multitasking capabilities and seamless operations for resource-intensive programs. This model also supports advanced virtualization technologies, making it easier for organizations to deploy multiple virtual machines on a single physical server, thus optimizing resource utilization.

The IBM 610 model is particularly known for its superior security features. With built-in encryption and data protection mechanisms, the 610 is designed to safeguard sensitive information against emerging cyber threats. This model adheres to stringent compliance standards, making it an ideal choice for organizations that handle critical data and require robust regulatory compliance.

Another notable characteristic across these IBM models is their reliability and uptime. IBM's engineering ensures that these systems have undergone rigorous testing to guarantee durability and performance stability. High availability configurations allow for continuous operation, minimizing downtime and ensuring business continuity.

In terms of connectivity, the IBM 6C1, 6E1, and 610 models support a wide range of networking protocols and interfaces. This flexibility allows organizations to seamlessly integrate these systems with existing IT infrastructure and modern cloud solutions.

Moreover, IBM provides comprehensive support and maintenance services for these models, ensuring that organizations can resolve issues promptly and keep their systems running optimally.

In conclusion, the IBM 6C1, 6E1, and 610 mainframe models offer a balanced combination of processing power, memory capacity, security features, and reliability. Their advanced technologies make them ideal for organizations looking to leverage mainframe capabilities for mission-critical applications and data management. With their proven track record, these IBM models continue to be a vital part of enterprise computing environments worldwide.
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