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IBM MiEM78P468N, MiEM78P468L manual Typical ICC1 vs. Temerature

Models: MiEM78P468L MiEM78P468N

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Current (uA)

EM78P468N/EM78P468L

8-Bit Microcontroller

20	Typical ICC1 vs. Temerature
20
15				VDD=5V
				VDD=5V
10
5
				VDD=3V
0
-40	-20	0	25	50	70	85
			Temperature (℃)

Fig. 8-18 Typical Power Consumption on Idle Mode Operation

Maximum ICC1 vs. Temerature

	25
	20
(uA)	15				VDD=5V
	15

Current	10
Current
	5				VDD=3V
	0
	-40	-20	0	25	50	70	85
				Temperature (℃)

Fig. 8-19 Maximum Power Consumption on Idle Mode Operation

Product Specification (V1.5) 02.15.2007

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(This specification is subject to change without further notice)

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IBM MiEM78P468N, MiEM78P468L manual Typical ICC1 vs. Temerature

Contents

EM78P468N/L Elan Microelectronics Corporation Contents Infrared Remote Control Application/PWM Waveform Generate Doc. Version Revision Description Date AppendixContents Product Specification V1.5 Features General DescriptionBit Microcontroller Pin QFP Pin Lqfp Pin AssignmentSystem Block Diagram Block DiagramSymbol Pin No Type Function Pin DescriptionPin Description for Package of QFP64 and LQFP64 SEG11~SEG14 Pin Description for Package of QFP44 and LQFP44Function Description 2 R1/TCC Timer Clock CounterOperational Registers 1 R0/IAR Indirect Addressing RegisterOn-ChipProgrammemory Bits 6 ~ 5 PS1 ~ 0 Page select bits 4 R3/SR Status RegisterBit 2 Z Zero flag Bit 0 C Carry flag6 R5/Port 5 Port 5 I/O Data and Page of Register Select 5 R4/RSR RAM Select Register7 R6/Port 6 Port 6 I/O Data Register 8 R7/Port 7 Port 7 I/O Data Register9 R8/Port 8 Port 8 I/O Data Register Bit 4 Lcden LCD enable bit10 R9/LCDCR LCD Control Register Lcdtype = 0 a type waveform Lcdtype = 1 B type waveformRC/CNTER Counter Enable Register 11 RA/LCDADDR LCD AddressRB/LCDDB LCD Data Buffer Address 0Dh 14 RD/SBPCR System, Booster and PLL Control RegisterMain clock Example Fs=32.768K15 RE/IRCR IR and Port 5 Setting Control Register Bit Microcontroller CPU Operation ModeAddress 0Eh 16 RF/ISR Interrupt Status Register Address 10h~3Fh R10~R3F General Purpose RegisterAddress 0Fh Special Purpose Registers AccumulatorAddress 05h, Bit 0 of R5 = 4 IOC70/P7CR Port 7 I/O Control Register 3 IOC60/P6CR Port 6 I/O Control Register5 IOC80/P8CR Port 8 I/O Control Register 6 IOC90/RAMADDR 128 Bytes RAM AddressIOCB0/CNT1PR Counter 1 Preset Register IOCC0/CNT2PR Counter 2 Preset RegisterIOCD0/HPWTPR High-Pulse Width Timer Preset Register IOCE0/LPWTPR Low-Pulse Width Timer Preset Register IOCF0/IMR Interrupt Mask RegisterBits 6, 5, 4 Not used Bit 7 Intedge 14 IOC71/TCCCR TCC Control RegisterBits 3~0 PSRE, TCCP2 ~ TCCP0 TCC prescaler bits TCC Rate16 IOC91/CNT12CR Counters 1, 2 Control Register 15 IOC81/WDTCR WDT Control RegisterBits 7 ~ 4 Not used WDT RateLow-pulse Width Timer Scale IOCA1/HLPWTCR High/Low Pulse Width Timer Control RegisterHigh-pulse Width Timer Scale Counter 1 ScaleIOCC1/P6OD Port 6 Open Drain Control Register IOCB1/P6PH Port 6 Pull-high Control RegisterIOCD1/P8PH Port 8 Pull High Control Register IOCE1/P6PL Port 6 Pull Low Control RegisterMUX TCC and WDT PrescalerTCC Setting Flowchart Bit Microcontroller WDT Setting FlowchartI/O Ports Reset and Wake-upBit Microcontroller Summary of Registers Initialized Values Address Name Reset Type BitINT Psre TCCP2 TCCP1 TCCP0 Name Reset Type Bit Wake-up Signal Sleep Mode Idle Mode Green Mode Normal Mode Phase Lock Loop PLL Mode OscillatorOscillator Modes Crystal Oscillator/Ceramic Resonators Crystal Main clock Example Fs=32.768KHzOscillator Source Oscillator Type Frequency C1 pF C2 pF RC Oscillator Mode with Internal Capacitor Power-on ConsiderationsRC Oscillator Frequencies Pin Rext Average Fosc 5V, 25 C Average Fosc 3V, 25 CResidue-Voltage Protection External Power-on Reset Circuit13 Interrupt Back-up InterruptLCD Driver 1 R9/LCDCR LCD Control RegisterBits 6 ~ 5 DS1 ~ DS0 LCD duty select 3 RB/LCDDB LCD Data Buffer 2 RA/LCDADDR LCD AddressBits 7 ~ 5 Not used, fixed to Bits 4 ~ 0 LCDA4 ~ LCDA0 LCD RAM addressBit 2 ~ 1 BF1 ~ 0 LCD booster frequency select bits 4 RD/SBPCR System, Booster and PLL Control RegistersBoosting circuits connection for LCD voltage External circuit for 1/3 BiasExternal circuit for 1/2 Bias 16 LCD Waveform for 1/2 Bias, 1/2 Duty 18 LCD Waveform for 1/3 Bias, 1/3 Duty ⋅ 1 + decimal C ounter Preset Value Iocc 0 ⋅ prescaler Infrared Remote Control Application/PWM Waveform Generate21 LGP=0, Irout Pin Output Waveform 23 LGP=0, Irout Pin Output Waveform IR application Bit Microcontroller IR/PWM Function Enable FlowchartBits 12 ~ 10 Not used Code OptionsWord Bits12~10 WordInstruction Set Bits 2~0 PR2~PR0 Protect BitPR1PR0Protect Convention Binary Instruction Hex Mnemonic Operation StatusJZA Binary Instruction Hex Mnemonic Operation Status AffectedAC Test Input/Output Waveform Timing DiagramAbsolute Maximum Ratings Items Symbol Condition Rating Min Max UnitDC Electrical Characteristics Electrical CharacteristicSymbol Parameter Condition Min Typ Max Unit Ta= -40 C ~85 C, VDD= 5.0V, GND=Ta= -40C ~85 C, VDD= 3.0V, GND= AC Electrical Characteristics Symbol Parameter Conditions Min Typ Max UnitTa=- 40C ~ 85 C, VDD=5V±5%, GND=0V Vih/Vil /RESET pins with schmitt inverter Device CharacteristicVih/Vil Port 7, Port 8 All Input pins with schmitt inverter P5.7 Voh/Ioh VDD=5V, IROCS=1 P5.7 Voh/Ioh VDD=3V, IROCS=1 80 P5.7 Voh/Ioh VDD=5V, IROCS=0 Max Typ +25 Setup time from Power on Reset = 51 K 13 Typical Eric OSC Frequency vs. Temperature Xin Pin VDD=5V Typical ICC2 vs. Temerature Typical ICC1 vs. Temerature Typical ISB vs. Temerature 22 Operating Voltage under Temperature Range of 0C to 70C Application Circuit Package Type Name Package Type Pin Count Package SizeEM78P468NxS/xJ QFP Package Information900 100 BSC 00 REF LqfpMin Normal Max 30TYP 15TYP Wiring diagram is for Elan Dwtr EM78P468N/L Program Pin ListProgram Pin Name IC Pin Name QFP-64 QFP-44 Main oscillator PLL mode, Sub oscillator Crystal mode Main oscillator Crystal mode, Sub oscillator Crystal modeICE 468XA Oscillator Circuit JP Main oscillator RC mode, Sub oscillator CrystalBit Microcontroller VLCD3 GND Osco ICE 468XA Output Pin Assignment JPQuality Assurance and Reliability Address Trap DetectTest Category Test Conditions Contents III