IBM MiEM78P468L 4 R3/SR Status Register, Bits 6 ~ 5 PS1 ~ 0 Page select bits, Bit 2 Z Zero flag

EM78P468N/EM78P468L

8-Bit Microcontroller

6.1.4R3/SR (Status Register)

(Address: 03h)

Bit	7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
−		PS1	PS0	T	P	Z	DC	C

Bit 7: Not used

Bits 6 ~ 5 (PS1 ~ 0): Page select bits

PS1	PS0	ROM Page (Address)
0	0	Page 0 (000H ~ 3FFH)
0	1	Page 1 (400H ~ 7FFH)
1	0	Page 2 (800H ~ BFFH)
1	1	Page 3 (C00H ~ FFFH)

PS0~PS1 are used to select a ROM page. User can use the PAGE instruction (e.g. PAGE 1) or set PS1~PS0 bits to change the ROM page. When executing a "JMP", "CALL", or other instructions which causes the program counter to be changed (e.g. MOV R2, A), PS0~PS1 are loaded into the 11th and 12th bits of the program counter where it selects one of the available program memory pages. Note that RET (RETL, RETI) instruction does not change the PS0~PS1 bits. That is, the return will always be to the page from where the subroutine was called, regardless of the current setting of PS0~PS1 bits.

Bit 4 (T): Time-out bit. Set to 1 by the "SLEP" and "WDTC" commands or during power up and reset to 0 by WDT timeout.

EventT

PRemark

WDT wake up from sleep mode	0	0
WDT time out (not sleep mode)	0	1
/RESET wake up from sleep	1	0
Power up	1	1
Low pulse on /RESET	1	1	⋅: don't care

Bit 3 (P): Power down bit. Set to 1 during power on or by a "WDTC" command and reset to 0 by a "SLEP" command.

Bit 2 (Z): Zero flag

Bit 1 (DC): Auxiliary carry flag

Bit 0 (C): Carry flag

8 • Product Specification (V1.5) 02.15.2007

(This specification is subject to change without further notice)