User’s Manual
Preliminary PPC440x5 CPU Core
ppc440x5IX.fm.
September 12, 2002 Page 581 of 583
allocated,54
instructions
all other, exception priorities for,208
allocated (other), exception priorities for,205
allocated instruction opcodes,557
allocated load and store, exception priorities for,203
alphabetical listing,254
alphabetical summary,524
branch, exception priorities for,207
byte ordering,44,45
byte-reverse,46
categories,249
allocated instruction summary,63
branch,60
integer,57
processor control,60
storage control,62
storage synchronization,63
classes
defined,53,55
preserved,56
CR updating,69
DAC debug events applied to
cache management,230
instructions that result in multiple storage accesses,
230
lswx, stswx,230
special cases,230
stwcx.,230
various,230
data cache management instruction summary,125
DVC debug events applied to
cache management,233
instructions that result in multiple storage accesses,
233
lswx, stswx,233
special cases,233
stwcx.,233
various,233
floating-point (other), exception priorities for,204
floating-point load and store, exception priorities for,
203
format diagrams,521
formats,519
forms,519,521
implemented instruction set summary,56
instruction cache management instruction summary,
108
integer compare
CR update,71
integerload, store, and cache management, exception
priorities for,202
mfmsr,165
mtmsr,165
opcodes,559
partially executed,164
preserved instruction opcodes,557
preserved, exception priorities for,207
privileged,80
privileged instructions, exception priorities for,205
pseudocode operator precedence,253
register usage,253
reserved instruction opcodes,558
reserved, exception priorities for,207
reserved-illegal,558
reserved-nop,558
return from interrupt, exception priorities for,207
rfi,167
sorted by opcode,559
syntax summary,525
system call, exception priorities for,206
trap, exception priorities for,206
integer instructions
arithmetic,58
compare,59
logical,59
rotate,59
shift,60
storage access,57
trap,59
integer load, store, and cache management instructions,
exception priorities for,202
integer processing,71
interfaces
interrupt controller,36
internal debug mode,219
interrupt
alignment interrupt,185
data storage interrupt,181
external input interrupt,185
instruction
partially executed,164
Instruction Storage,184
instruction storage interrupt,184
instruction TLB miss interrupt,194
machine check interrupt,178
masking,199
guidelines for system software,201
ordering,199,201
guidelines for system software,201
program interrupt,187
illegal instruction exception,187
privileged instruction exception,187
trap exception,190
system call interrupt,190
type
Alignment,185
Auxiliary Processor Unavailable,191
Critical Input,178
Data Storage,181
Data TLB Error,193
Debug,195