Intel® 21143 PCI/CardBus 10/100Mb/s Ethernet LAN Controller
This design guide provides a description of how to implement
While this document will not provide specific recommendations for physical layer devices, it will provide design recommendations and layout recommendations.
This application note provides a description of how to implement
1.0Functional Overview
This section provides an overview of the 21143 and the implementation of 100 Mb/s and 10 Mb/s network connections using
1.121143 Overview
The 21143 is a
The 21143 provides a complete implementation of the IEEE 802.3 Ethernet specification. This includes the attachment unit interface (AUI),
The PCI interface utilizes only about 10% of the bus bandwidth during fully networked operation for 100 Mb/s Fast Ethernet reception or transmission. This bus master design results in high throughput between the system and the network.
1.2Network Interface
The 21143 physical layer design supports AUI drop cable Ethernet and
Table 1. Signal gep<0>/aui_bnc Description
Program State | Function |
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0 | AUI port enabled; BNC port disabled. |
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1 | BNC transceiver (or |
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AUI signals interface with the Manchester encoder/decoder portion of the 21143. The 21143 supports 10BASE5 thickwire and 10BASE2 ThinWire connections. The 10BASE2 connection requires an external transceiver.
Design Guide | 5 |