82575 Ethernet Controller Design Guide

Note: To avoid signal contention, all four pins are set as input pins until after EEPROM configuration has been loaded.

In addition to all four pins being individually configurable as inputs or outputs, they may be configured for use as general-purpose interrupt (GPI) inputs. To act as GPI pins, the desired pins must be configured as inputs. A separate GPI interrupt-detection enable is then used to enable rising-edge detection of the input pin (rising-edge detection occurs by comparing values sampled at 62.5 MHz, as opposed to an edge- detection circuit). When detected, a corresponding GPI interrupt is indicated in the Interrupt Cause register.

The use, direction, and values of SDPs are controlled and accessed using fields in the Device Control Register (CTRL) and Extended Device Control Register (CTRL_EXT).

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Intel 317698-001 manual Ethernet Controller Design Guide

317698-001 specifications

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