Specification Update 47
BU93. During Package Power States Repeated PCIe* and/or DMI L1
Transitions May Cause a System Hang
Problem: Under a complex set of internal conditions and operating temperature, when the
processor is in a deep power state (package C3, C6 or C7) and the PCIe and/or DMI
links are toggling in and out of L1 state, the system may hang.
Implication: Due to this erratum, the system may hang.
Workaround: It is possible for the BIOS to contain a workaround for this erratum.
Status: For the steppings affected, see the Summary Tables of Changes.
BU94. Instruction Fetches Page-Table Walks May be Made Speculatively to
Uncacheable Memory
Problem: Page-table walks on behalf of instruction fetches may be made speculatively to
uncacheable (UC) memory.
Implication: If any paging structures are located at addresses in uncacheable memory that are used
for memory-mapped I/O, such I/O operations may be invoked as a result of speculative
execution that would never actually occur in the executed code path. Intel has not
observed this erratum with any commercially available software.
Workaround: Software should avoid locating paging structures at addresses in uncacheable memory
that are used for memory-mapped I/O.
Status: For the steppings affected, see the Summary Tables of Changes.
BU95. The Processor May Not Properly Execute Code Modified Using A Floating-Point
Store
Problem: Under complex internal conditions, a floating-point store used to modify the next
sequential instruction may result in the old instruction being executed instead of the
new instruction.
Implication: Self- or cross-modifying code may not execute as expected. Intel has not observed this
erratum with any commercially available software.
Workaround: None identified. Do not use floating-point stores to modify code.
Status: For the steppings affected, see the Summary Tables of Changes.
BU96. Execution of GETSEC[SEXIT] May Cause a Debug Exception to be Lost
Problem: A debug exception occurring at the same time that GETSEC[SEXIT] is executed or when
an SEXIT doorbell event is serviced may be lost.
Implication: Due to this erratum, there may be a loss of a debug exception when it happens
concurrently with the execution of GETSEC[SEXIT]. Intel has not observed this erratum
with any commercially available software.
Workaround: None identified.
Status: For the steppings affected, see the Summary Tables of Changes.