Evaluation Platform Board Manual 33
Intel® IQ80332 I/O Processor
Hardware Reference Section
3.6.2 UART
The 80332 has two integrated U ARTs. Each asynchronous serial ports supports all the functions of a
16550 UART. The UART signals are connected to a dual RS-232 buffer and then to a RJ-11 serial
port connector mounted on the bracket of the evaluation board. The serial port and GPIO sig nals are
muxed on the same pins. Jumper J1D2, located next to the serial port buffer can dis able the buffer to
allow the signals to be used as GPIO signals. Please see Sec tion 3.9.3, “Jum per Summary” on
page 39 for more details.
3.6.3 Non-Volatile RAM
In addition to the 8MB Flash device, the IQ 80332 has a separate 32k by 8 non-volatile RA M device
on the peripheral bus. The N VRAMs address range is from C E87 0000 to CE87 FFFF (in hex ).
Please see Section4.2.2, “Peripheral Bus Memory Map” on page 47 for more details.
3.6.4 Audio Buzzer
The 80332 evaluation board has an audio bu zzer that is turned on and off by writing to the Buzzer
Control Register located in the CPLD. Jumper J9D3 adjusts th e volume from off, to soft, to loud.
Please see Section 3.9.3, “Jumper Summary” on page39 for more details. The audio buzzer’s
address range is from CE86 00 00 to CE86 FFFF (in hex). Pleas e see Section 4.2 .2 , “Pe ripheral Bus
Memory Map” on page 47 for more details.
3.6.5 HEX Display
The two pairs of Agilent HDSP-A10 3 seven segment LE D s are used for displaying POST code s or
other software generated debug codes. Both HEX displays are individually addressed. Th e left HEX
display address range is CE84 0000 to CE84 FFFF (in hex). T he right HEX display address ra nge is
CE85 0000 to CE85 FFFF (in h ex). Please see Section 4.2.2, “Peripheral Bus Memory Map” on
page 47 for more details.
3.6.6 Rotary Switch
The 80332 provides a Rotary Switch (S8A1) for the u s er to select from different boot-up flavors.
Setting ‘1’ enables private devices on the s econdary PCI-X bus. Setting ‘1’ allows Redboot to
configure and use devices in slot A. Position ‘0 ’ allows the host to see all the devices on the
secondary PCI bus. The default setting is pos ition 1. Other settings are currently not valid ated with
Redboot. Other settings may be used with oth er software applications. Please see Sectio n 4.2.2,
“Peripheral Bus Memory Map” on page47 for more de tails on addressing the rotary switch.
Table 12. Rotary Switch Requirements
Description
Rotary switch has a 4-bit resolution (16 positions).
The connection to the peripheral bus is depicted by Figure 7.
Default setting is ‘1’. Th is enables private device s on PCI-X bus.
Position ‘0’ allow s host to see all devices on the sec ondary bus.