40 Evaluation Platform Board Manual
Intel® IQ80332 I/O Processor
Hardware Reference Section
3.9.6 Detail Descriptions of Switches/Jumpers

3.9.6.1 Switch S1C2: 80332 Reset

This switch resets 80332.

3.9.6.2 Switch S6A1: BPCI-X Reset

This switch resets the PCI-X B segment bus .

3.9.6.3 Switch S8A1: Rotary

For more information, please see Section 3.6.6, “Rotary Switch” on page 33.

3.9.6.4 Switch S7A1

This 10 pin switch that allows the user to enable or disable various features. Please see speci fics
below.
3.9.6.4.1 S7A1-1: PCI-X Bus A Speed Enable corresponding to signal name PBI_AD3
This switch allows the user to force the PCI-X bus A to run at 133 MH z or 100 MHz.
Table 21. S7A1-1: PCI-X Bus A Speed Enable
3.9.6.4.2 S7A1-2: Reset IOP core corresponding to signal name PBI_AD5
RESET MODE is latched at the de-asserting edge of P_RST# and it determines when the 80332 is held
in reset until the Intel XScale® core Reset bit is cleared in the PCI Configuration and Status Register.
Table 20. Rotary Switch Settings
Position Description
1
Factory Default
Enables private devic es on the sec on da ry P CI -X s lo t. R edb oo t uses th is set tin g to co nf i gure
private devices
0Disables private device s on the seco ndar y PC I-X slot . T his set t ing al lo ws th e ho st to see al l
the devices on the secondary PCI bus.
2-F These settings are meaningless to Redb oot. Other applica tions may use these s ettings for
configuration or sof tware utilization.
S7A1-1 Operation Mode
Open Enables 133 MHz on PCI-X bus A
Closed Enables 100 MHz on PCI-X bu s A (Default Mode )
Table 22. Switch S7A1-2: Reset IOP: Settings an d Operation Mode
S7A1-2 Operation Mode
Open Don't hold in reset, en able IOP core (Default mode).
Closed Hold IOP core in reset.