Intel manual 2.3Quick-StartChecklists, Intel LXD972M Transceiver Demo Board Board Rev A1

Models: LXD972M

1 22
Download 22 pages 42.27 Kb
Page 9
Image 9
2.3Quick-Start Checklists

Intel® LXD972M Transceiver Demo Board (Board Rev A1)

2.3Quick-Start Checklists

Use the quick-start checklists in this section to set up the LXD972M Demo Board, shown in Figure 2, “Intel® LXD972M Transceiver Demo Board” on page 10.

The following quick-start setup procedure sets all ports to the default condition, which includes Auto-Negotiation enabled, advertising dual-speed, and full-duplex/half-duplex capabilities.

1.Set the jumpers as listed in Table 2.

The following jumpers are defined as follows: LED1 has the functionality of LED/CFG1, LED2 has the functionality of LED/CFG2, and CFG has the functionality of LED/CFG3 as defined by the LXT972M Transceiver datasheet.

2.Set SW1 switches as listed in Table 3.

3.Connect the MII port of the LXD972M Demo Board to the Smartbits test box through the MII connector/cable. A male-to-male cable is required to interface the Smartbits test box to the LXD972M Demo Board and is available from Newark* (.5m cable - Newark 91F9746).

4.Connect the twisted-pair port through a Twisted-Pair crossover cable to the RJ-45 card in the SmartBits test box.

5.Power up the Smartbits test box.

6.When the LXD972M Demo Board is configured according to desired test settings, apply the desired power connections per Table 4 options in Section 2.4.2, “Power Supply Voltage Source and Clock Options” on page 12 and press Reset switch S2.

7.Proceed with testing.

Table 2. Quick-Start Checklist for Jumper Settings

Jumper

Label

Setting

Configuration

 

 

 

 

 

JP1,

LED1,

 

 

"Sets Port Configuration to 111 for Auto-Negotiation,

JP2,

LED2,

Pins 1, 2

Jumper

10/100 Mbps, Full-Duplex. For details, see Section

JP3

CFG

 

 

2.4.5, “CFG Pin Configuration Options” on page 14.

 

 

 

 

 

JP12

VCCA

Jumpered

Routes power from VCCD connector (BN4) through

JP12 to the VCCA input.

 

 

 

 

 

 

 

 

 

JP16

MDIO

Pins 2, 3

Jumper

Routes MDIO through MII 40-pin Connector P1.

 

 

 

 

 

JP17

MDC

Pins 2, 3

Jumper

Routes MDC through MII 40-pin Connector P1.

 

 

 

 

 

 

 

Pins 1, 2

Open

Disables output of clock oscillator Y2.

JP18

Clock Select

 

 

 

Pins 3, 4

Jumper

Connects crystal across XI and XO to enable Y1.

 

 

 

 

Pins 5, 6

Jumper

 

 

 

 

 

 

 

 

JP19

Reset

Pins 1,2

Jumper

Connects reset button

 

 

 

 

 

Table 3. Quick-Start Checklist for Switch Settings

 

Switch / Label

Setting

Configuration

 

 

 

 

SW1-1

/ ID EN

Off

Not applicable for LXT972M Transceiver.

 

 

 

 

SW1-2

/ ADDR0

Off

Sets ADDR0 = 0 (“Off” position)

 

 

 

 

SW1-3

/ ADDR1

Off

Sets ADDR1 = 0 (“Off” position)

 

 

 

 

SW1-4

/ LINKHOLD / RBIAS

Off

Not applicable for LXT972M Transceiver.

 

 

 

 

Preliminary User’s Guide

9

Document Number: 303125

Revision Number: 002

Revision Date: October 22, 2004

Page 9
Image 9
Intel manual 2.3Quick-StartChecklists, Intel LXD972M Transceiver Demo Board Board Rev A1, Preliminary User’s Guide