Intel® Server Platform SR6850HW4 TPS | Cables and Connectors |
4.2.3Etherent Connectors
The Server Board Set SE8500HW4 Mainboard provides a
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| Table 11. TaDual Ethernet Stacked Connector | |||
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Pin |
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LED Signals |
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27 | DNW_LINKB10_N | Lower (Port 1) green status LED cathode signal indicating Port 1 activity | |||
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28 | DNW1_ACT_N_R | Lower (Port 1) green status LED anode to | |||
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29 | DNW_LINKB100_N | Lower (Port 1) green speed LED cathode, yellow LED anode | |||
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30 | LANB1000_N_R | Lower (Port 1) yellow speed LED cathode, green LED anode | |||
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31 | DNW_LINKA10_N | Upper (Port 2) green status LED cathode signal indicating Port 2 activity | |||
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32 | DNW0_ACT_N_R | Upper (Port 2) green status LED anode to | |||
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33 | DNW_LINKA100_N | Upper (Port 2) green speed LED cathode, yellow LED anode | |||
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34 | LANA1000_N_R | Upper (Port 2) yellow speed LED cathode, green LED anode | |||
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Ethernet | Signals |
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15 | DNW_MDIB_DP<0> | Port 1 transceiver | 0 | positive of differential pair | |
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21 | DNW_MDIB_DN<0> | Port 1 transceiver | 0 | negative of differential pair | |
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23 | DNW_MDIB_DP<1> | Port 1 transceiver | 1 | positive of differential pair | |
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16 | DNW_MDIB_DN<1> | Port 1 transceiver | 1 | negative of differential pair | |
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18 | DNW_MDIB_DP<2> | Port 1 transceiver | 2 | positive of differential pair | |
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24 | DNW_MDIB_DN<2>> | Port 1 transceiver | 2 | negative of differential pair | |
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26 | DNW_MDIB_DP<3> | Port 1 transceiver | 3 | positive of differential pair | |
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19 | DNW_MDIB_DN<3> | Port 1 transceiver | 3 | negative of differential pair | |
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6 | DNW_MDIA_DP<0> | Port 2 transceiver | 0 | positive of differential pair | |
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13 | DNW_MDIA_DN<0> | Port 2 transceiver | 0 | negative of differential pair | |
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11 | DNW_MDIA_DP<1> | Port 2 transceiver | 1 | positive of differential pair | |
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5 | DNW_MDIA_DN<1> | Port 2 transceiver | 1 | negative of differential pair | |
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3 | DNW_MDIA_DP<2> | Port 2 transceiver | 2 | positive of differential pair | |
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10 | DNW_MDIA_DN<2> | Port 2 transceiver | 2 | negative of differential pair | |
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8 | DNW_MDIA_DP<3> | Port 2 transceiver | 3 | positive of differential pair | |
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2 | DNW_MDIA_DN<3> | Port 2 transceiver | 3 | negative of differential pair | |
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Power | Signals |
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4, 7, 9, 12, 14, | +1.8V Standby |
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17, 22, 25 |
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1, 20, 35, 36, | Chassis | Ground |
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37, 38 |
| Ground |
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Revision 1.0 | 37 |
| Intel order number |