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Crown Beach Board
Feature | Crown Beach Board | Comments | |
| Implementation |
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| 2 connectors. |
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PCI Express* | Mini Card connector A, |
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functionality is enabled by | NOTE: For more information, refer to | ||
Mini Card | default. | ||
Section 2.5.4, PCI Express* | |||
connector |
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NOTE: PCI Express* signals are | Slots. | ||
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| left unconnected on Mini |
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| Card B. |
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LPC | One LPC slot | No DMA support | |
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TPM | Through TPM header (TPM 1.2) |
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Microcontroller | Renesas Technology* H8S/2117 | Includes integrated SPI as an option | |
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FWH | FWH LPC based with socket | ||
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SIO | Uses TPM header | Backup only; provides floppy, COM, | |
Parallel, and PS2 | |||
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SMC/KBC | Scan matrix headers and PS/2 in | ACPI compliant through H8S/2117 | |
back panel keyboard connector | |||
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RTC |
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Port 80 Decode | Supported down on motherboard | Has an option for | |
with four | of chassis | ||
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Power Supply | Desktop Mode | ATX Power Supply | |
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Virtual Battery | SW8A1 switch | ||
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ITP Support | Extended Debug Port (XDP) | J1E3 XDP connector | |
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Power |
| S0 – Power On | |
| S3 – Suspend to RAM | ||
Management | ACPI Compliant | ||
S4 – Suspend to Disk | |||
Form Factor |
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| S5 – Soft Off | ||
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2.4Processor Support
The reference board supports the Intel® Atom™ processor Z530 with
2.4.1Processor Voltage Regulators
The reference board uses an onboard Intel® MVP6
User’s Manual | 15 |
Document Number: 320264