Intel US15W Bsel Jumper Settings, Manual VID Support for CPU, Processor, Intel SCH Graphics

Reference Board Summary

4.4BSEL Jumper Settings

The jumper settings in Table 10 are provided to accommodate frequency selection for the processor. The CK-540 clock chip accepts two signals from the Intel® Atom™ processor.

Table 10. BSEL Jumper Settings

			Processor
		CPU		Override
	Processor driven	J8G3 Æ 1-2		No override
		J9G3 Æ 1-2
	400	J8G3Æ Open		CPU BSEL 1=0
FSB	(Host CLK = 100 MHz)
		J9G3Æ 2-3		CPU BSEL 2=1
Speed
(MHz)
	Default	J8G3Æ Open		CPU BSEL 1=0
	533	J9G3Æ Open		CPU BSEL 2=0
	(Host CLK = 133 MHz)

Intel® SCH

Graphics

See note.

J6F1 Æ 2-3

J7F2 Æ 2-3

J6F1 Æ 1-2 J7F2 Æ 2-3

NOTE: Jumpers J7F2 and J6F1 must be set according to the FSB frequency to ensure 200-MHz operation.

4.5Manual VID Support for CPU

The Crown Beach supports manual VID operation for the processor VR. A header (J1B1) is provided to incorporate “VID override”. VID override allows for overriding the CPU VID outputs to the CPU VCC_CORE VR. The intent of the “VID override” circuit is to enable debugging and testing. See Appendix B for the VID code table.

Note: When manually overriding the VID outputs, an open jumper position will result in logic ‘1’ on the corresponding VID signal. Closing the jumper position will result in logic ‘0’ on the corresponding VID signal.

User’s Manual 32

Document Number: 320264