4.5BU1923F (IC51) : RDS decoder
• Pin layout
QUAL | 1 | 16 | RCLK |
RDATA | 2 | 15 | N.C. |
Vref | 3 | 14 | XO |
MUX | 4 | 13 | XI |
VDD1 | 5 | 12 | VDD2 |
VSS1 | 6 | 11 | VSS2 |
VSS3 | 7 | 10 | T1 |
CMP | 8 | 9 | T2 |
• Block diagram
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| VSS3 | CMP |
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| 7 | 8 |
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MUX | 100k |
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4 |
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| 120k | - |
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| 100k |
| 8th Switched |
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Vref |
| + |
| capacitor filter | comparator |
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3 |
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| filter |
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VDD1 | 5 |
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| 16 | RCLK | |
| Analog |
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| Power supply |
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VSS1 6 |
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| 1 | QUAL | ||
VDD2 | 12 | PLL | PLL | Differential | 2 | RDATA | ||
57kHz | ||||||||
1187.5Hz | decoder | decoder | ||||||
| Digital | RDS/ARI |
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| Power supply |
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VSS2 11 | Reference | Measurement |
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| circuit |
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| clock |
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| 13 | 14 |
| 10 | 9 |
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| Xl | X0 |
| T1 | T2 |
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