3.Pin function
Pin no. | Symbol | I/O | Function |
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36 | PI1 | IN/OUT | |
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| Operation : MPEG header bit 30(Emphasis) |
37 | P0 | IN/OUT | |
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| Operation MPEG header bit 31 (Emphasis) |
38 | CLKO | O | Clock Output (normal 24.576 MHz) |
39 | PUP | O | Power Up, i.e.Status of Voltage Supervision |
40 | WSEN | I | WS Enable : Enable DSP |
41 | ERDY | O | WSEN=0 : Valid clock input at CLKI |
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| WSEN=1 : Clock synthesizer PLL locked |
42 | AVDD | Supply | Supply for Analog Circuits |
43 | CLKI | I | Clock Input |
44 | AVSS | Supply | Ground Supply for Analog Circuits |
1)
BU4066BCFV-X (IC322) : Quad analog switch
1. Pin layout & Block diagram |
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VDD | C1 | C4 | I/O4 | O/I4 | O/I3 | I/O3 |
14 | 13 | 12 | 11 | 10 | 9 | 8 |
1 | 2 | 3 | 4 | 5 | 6 | 7 |
I/O1 | O/I1 | O/I2 | I/O2 | C2 | C3 | Vss |