MSI G41M-P23 manual Memory-Z

CPU Technology Support

Press <Enter> to enter the submenu, that shows the technologies that the in- stalled CPU supported.

Intel EIST

The Enhanced Intel SpeedStep technology allows you to set the performance level of the microprocessor whether the computer is running on battery or AC power. This field will appear after you installed the CPU which support speedstep technology.

Adjust CPU FSB Frequency (MHz)

This item allows you to adjust the CPU FSB frequency.

Adjust CPU Ratio

This item is used to adjust CPU clock multiplier (ratio). It is available only when the processor supports this function.

Adjusted CPU Frequency (MHz)

It shows the adjusted CPU frequency (FSB x Ratio). Read-only.

MEMORY-Z

Press <Enter> to enter the submenu.

DIMM1/2 Memory SPD Information

Press <Enter> to enter the submenu, that displays the informations of installed memory.

Advance DRAM Configuration Press <Enter> to enter the submenu.

DRAM Timing Mode

Selects whether DRAM timing is controlled by the SPD (Serial Presence De- tect) EEPROM on the DRAM module. Setting to [Auto By SPD] enables DRAM timings and the following related items to be determined by BIOS based on the configurations on the SPD. Selecting [Manual] allows users to configure the DRAM timings and the following related items manually.

CAS Latency (CL)

When the DRAM Timing Mode sets to [Manual], the field is adjustable. This controls the CAS latency, which determines the timing delay (in clock cycles) before SDRAM starts a read command after receiving it.

tRCD

When the DRAM Timing Mode sets to [Manual], the field is adjustable. When DRAM is refreshed, both rows and columns are addressed separately. This setup item allows you to determine the timing of the transition from RAS (row address strobe) to CAS (column address strobe). The less the clock cycles, the faster the DRAM performance.

tRP

When the DRAM Timing Mode sets to [Manual], the field is adjustable. This item controls the number of cycles for Row Address Strobe (RAS) to be al- lowed to precharge. If insufficient time is allowed for the RAS to accumulate its charge before DRAM refresh, refreshing may be incomplete and DRAM may

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