National Instruments Corporation 3-1 AT-MIO/AI E Series User Manual
Hardware Overview
Chapter
3

This chapter presents an overview of the hardware functions on your

AT E Series board.

Figure 3-1 shows the block diagram for the AT-MIO-16E-1 and

AT-MIO-16E-2

Figure 3-1. AT-MIO-16E-1 and AT-MIO-16E-2 Block Diagram
Timing
PFI / Trigger

I/O Connector

3
RTSI Bus

AT – I/O Channel

Digital I/O (8)
12-Bit
Sampling
A/D
Converter
EEPROM
Configuration
Memory
+
NI-PGIA
Gain
Amplifier
–
Calibration
Mux
Mux Mode
Selection
Switches
Analog
Muxes
Voltage
REF
Calibration
DACs
Dither
Circuitry
Trigger
Analog
Trigger
Circuitry
2
Trigger Level
DACs
6Calibration
DACs
DAC0
DAC1
3
DAQ - STC
Analog Input
Timing/Control
Analog Output
Timing/Control
Digital I/O
Trigger
Counter/
Timing I/O
RTSI Bus
Interface
DMA/
Interrupt
Request
Bus
Interface
(8)
(8)
DAC
FIFO
8
Data (16)
AI Control
Data (16)
Analog
Input
Control
EEPROM
Control DMA
Interface
DAQ-PnP
DAQ-STC
Bus
Interface
Plug
and
Play
Analog
Output
Control
8255
DIO
Control
Bus
Interface
IRQDMA
Data
Transceivers
AO Control
ADC
FIFO