National Instruments Low-Cost Multifunction I/O Board for ISA Lab-PC+ - page 144

Register Map and Descriptions Appendix D
Lab-PC+ User Manual D-28 © National Instruments Corporation
Timer Interrupt Clear Register
Writing to the Timer Interrupt Clear Register clears the interrupt request asserted when a low
pulse is detected on the Counter A2 output or on EXTUPDATE* line.
Address: Base address + 0C (hex)
Type: Write-only
Word Size: 8-bit
Bit Map: Not applicable, no bits used.