© National Instruments Corporation Index-1 Lab-PC+ User Manual
Index

Numbers

2SDAC0 bit, D-9
2SDAC1 bit, D-9
+5 V signal (table), 3-3
8253 Counter/Timer Register
Groups A and B, D-23 to D-32
Counter A Mode Register
description, D-27
interrupt programming for analog output
circuitry, E-22 to E-23
Counter A0 Data Register
controlled acquisition mode, E-6, E-7
posttrigger mode, E-13
pretrigger mode, E-15
description, D-24
freerun acquisition mode, 4-6, E-9
used as sample interval counter, E-9
Counter A1 Data Register
controlled acquisition mode, E-7
posttrigger mode, E-13
pretrigger mode, E-15
description, D-25
freerun acquisition mode, E-10
single-channel interval acquisition
mode, E-19
Counter A2 Data Register, D-26
Counter B Mode Register
description, D-32
multiple A/D conversions using interval
scanning, E-18
single-channel interval acquisition
mode, E-19
Counter B0 Data Register
description, D-29
programming
controlled acquisition mode, E-6
freerun acquisition mode, E-9
Counter B1 Data Register
description, D-30
multiple A/D conversions using interval
scanning, E-18
single-channel interval acquisition
mode, E-19
Counter B2 Data Register, D-31
overview, D-23
register map, D-2
Timer Interrupt Clear Register, D-28
8255A Digital I/O Register
Group, D-33 to D-37
Digital Control Register, D-37
overview, D-33
Port A Register, D-34
Port B Register, D-35
Port C Register, D-36
programming, E-23 to E-34
control-word format
control-word flag set to 0 (figure), E-24
control-word flag set to 1 (figure), E-24
Mode 0 operation, E-25 to E-26
control words, E-25 to E-26
programming examples, E-26
Mode 1 input, E-27 to E-28
control words, E-27
Port C pin assignments, E-28
Port C status-word bit definitions, E-28
programming example, E-29
Mode 1 output, E-29 to E-31
control words, E-29
Port C pin assignments, E-30
Port C status-word bit definitions, E-30
programming example, E-31
Mode 2 operation, E-31 to E-34
control words, E-31 to E-32
Port C pin assignments, E-33
Port C status-word bit definitions, E-32
programming example, E-33
single bit set/reset control words, E-33
single bit set/reset feature, E-34
register map (table), D-2

A

ACH<0..7> signal
description (table), 3-3
input ranges and maximum ratings, 3-4
ACK* signal
description, 3-16
Mode 1 output timing, 3-19
Mode 2 bidirectional timing, 3-20
Port C signal assignments (table), 3-16