Theory of Operation Chapter 4
Lab-PC+ User Manual 4-12 © National Instruments Corporation
A/D Conversion Logic
N/C
1 MHz Source OUTB0
CLKA0
GATEB0
OUTB0
CCLKB1
GATEB1
OUTB2
GATEB2
CLKB2
D/A Conversion Timing
8253 Counter/Timer
Group A
MUX
CTR RD
CTR WR
Data
8
PC I/O Channel
8253 Counter/Timer
Group B
OUTB0
OUTB2
GATEB2
CLKB2
GATEB1
Scan
Interval/
General
Purpose
Counter
CLKB1
OUTB1
GATEB0
Timebase
Extension/
General
Purpose
Counter
CLKB0
+5 V
MUX
MUX
MUX
EXTUPDATE*
EXTTRIG
EXTCONV*
COUTB1
I/O Connector
CLKA2
OUTA0
Sample
Interval
Counter
CLKA0
GATEA0
CLKA1
Sample
Counter
GATEA1
OUTA1
GATEA2
DAC
Timing
OUTA2
2 MHz
Source
Figure 4-6. Timing I/O Circuitry Block Diagram