National Instruments NI 5911 Hardware Overview

©NationalInstruments Corporation 2-1 NI5911 User Manual

Hardware Overview

Thischapter includes an overview of the NI 5911,explains the operation of

each functionalunit making up y ourN I 5911,and d escribes the signal

connections. Figure 2-1 shows a block diagram of the NI 5911.

Figure2-1. NI 5911 Block Diagram

Differential Programmable Gain Input Amplifier (PGIA)

The analog input of the NI 5911 is equipped with a differential

programmablegain input amplifier. The PGIA accurately interfaces to and

scalest he signal presented to the analog-to-digital converter (ADC)

regardless of source impedance, source amplitude, DC biasing, or

common-modenoise voltages.

Protect/

Calibration

Mux

Calibration

Generator

PGIA

Noise

Shaper

Reference

Clock

Data

A/DConverter

100MHz, 8-Bit

DigitalSignal

Processor

DigitalIO

Connector

AnalogInput

Connector

AC/DCCoupling

Capture

Memory

TimingIO/

MemoryControl

Contents

Main Page Important Information Warranty Copyright Trademarks WARNINGREGARDING USE OF NATIONAL INSTRUMENTS PRODUCTS Compliance FCC/Canada Radio Frequency Interference Compliance* Determining FCC Class FCC/DOC Warnings Class A Compliance to EU Directives Conventions Contents Chapter 1 Taking Measurements with the NI 5911 Chapter 2 Hardware Overview Page Taking Measurements with the NI 5911 Installing the NI 5911 Connecting Signals Page Acquiring Data with Your NI 5911 Programmatically Controlling Your NI 5911 Interactively Controlling Your NI 5911 with the ScopeSoft Front Panel Hardware Overview Differential Programmable Gain Input Amplifier (PGIA) Differential Input Grounding Considerations Input Ranges Input Impedance Input Bias Input Protection AC Coupling Oscilloscope and Flexible Resolution Modes Oscilloscope Mode Sampling MethodsReal-Time and RIS Flexible Resolution Mode How Flexible Resolution Works Calibration Internally Calibrating the NI 5911 When Internal Calibration Is Needed What Internal Calibration Does Why Errors Occur During Acquisition Triggering and Arming Analog TriggerCircuit TriggerHold-Off Memory Triggeringand Memor y Usage Multiple-Record Acquisitions RTSI Bus and Clock PFI PFI Lines PFI Lines as Inputs PFI Lines as Outputs Synchronization A Specifications Acquisition System Page Acquisition Characteristics Accuracy Common-Mode Characteristics Filtering Dynamic Range Noise (excluding input-referred noise) 100/n*MS/s 100MHz 120dBfs/ 43dBfs Distortion Timebase System TriggeringSystems Acquisition Modes Power Requirements Physical Operating Environment Storage Environment EMC Compliance Calibration B Technical Support Resources Web Support NI Developer Zone Customer Education System Integration Worldwide Support Glossary Symbols A B C D E F G H I Page N O P R S T U V W Index A B C D G H I M N O P R S T