National Instruments NI cDAQ-9172 Hardware-Timed Generations

© National Instruments Corporation 21 NI cDAQ-9172 User Guide and Specifications

referred to as immediate or static operations. They are typically used for

writing out a single value, such as a constant DC voltage.

The following considerations apply to software-timed generations:

• If any AO channel on a module is used in a hardware-timed

(waveform) task, no channels on that module can be used in a

software-timed task.

• You can configure software-timed generation to simultaneously

update.

• Only one simultaneous update task can run at a time.

• Simultaneous update is not restricted to 16 channels.

• A hardware-timed AO task and a simultaneous update AO task cannot

run at the same time.

Hardware-Timed Generations

With a hardware-timed generation, a digital hardware signal controls the

rate of the generation. This signal can be generated internally on the chassis

or provided externally.

Hardware-timed generations have several advantages over software-timed

acquisitions:

• The time between samples can be much shorter.

• The timing between samples is deterministic.

• Hardware-timed acquisitions can use hardware triggering.

Hardware-timed AO operations on the NI cDAQ-9172 chassis must be

buffered.

Buffered Analog Output

A buffer is a temporary storage in computer memory for generated

samples. In a buffered generation, data is moved from a host buffer to the

NI cDAQ-9172 onboard FIFO before it is written to the C Series I/O

modules.

One property of buffered I/O operations is sample mode. The sample mode

can be either finite or continuous.

Finite sample mode generation refers to the generation of a specific,

predetermined number of data samples. Once the specified number of

samples is written out, the generation stops.

Continuous generation refers to the generation of an unspecified number of

samples. Instead of generating a set number of data samples and stopping,

Contents

Main USER GUIDE AND SPECIFICATIONS NI cDAQ-9172 Safety Guidelines Safety Guidelines for Hazardous Voltages National Instruments Corporation 3 NI cDAQ-9172 User Guide and Specifications Installing the NI cDAQ-9172 Figure 2 shows the dimensions of the NI cDAQ-9172 chassis. Figure 2. NI cDAQ-9172 with Dimensions in Millimeters (Inches) Mounting the NI cDAQ-9172 NI 9901 Desktop Mounting Kit Mounting the NI 9910 DIN-Rail Kit Mounting the NI 9905 Panel Mount Kit Figure 5. Panel Mount Dimensions and Installation on the NI cDAQ-9172 Setting Up the NI cDAQ-9172 Page Understanding LED Indications Active LED Ready LED Using the NI cDAQ-9172 C Series I/0 Modules Correlated vs. Static DIO Modules cDAQ Module Interface USB-STC2 AI and AO Sample Timing Triggering Modes Analog Input Analog Input Triggering AI Start Trigger Signal Routing AI Start Trigger to an Output Terminal AI Reference Trigger Signal Page Routing AI Reference Trigger Signal to an Output Terminal AI Pause Trigger Signal Analog Input Timing Signals AI Sample Clock Routing AI Sample Clock to an Output Terminal AI Sample Clock Timebase Convert Behavior For Analog Input Modules Scanned Simultaneous Sample-and-Hold Sigma-Delta Slow Sample Rate Modules Getting Started with AI Applications in Software Analog Output Analog Output Data Generation Methods Software-Timed Generations Hardware-Timed Generations Buffered Analog Output Analog Output Triggering Analog Output Timing Signals AO Sample Clock Routing AO Sample Clock to an Output Terminal AO Sample Clock Timebase AO Start Trigger Signal Routing AO Start Trigger Signal to an Output Terminal AO Pause Trigger Signal Page Minimizing Glitches on the Output Signal Getting Started with AO Applications in Software Digital I/O Correlated vs. Static DIO Modules Static DIO Digital Waveform Acquisition (Correlated Input) DI Sample Clock Signal Using an Internal Source Using an External Source Digital Waveform Generation (Correlated Output) Buffered Digital Waveform Generation Page PFI Counters Figure 15. NI cDAQ-9172 Counters Counter Input Applications Counting Edges Single-Point (On-Demand) Edge Counting Buffered (Sample Clock) Edge Counting Controlling the Direction of Counting Pulse-Width Measurement Single Pulse-Width Measurement Buffered Pulse-Width Measurement Period Measurement Single Period Measurement Buffered Period Measurement Semi-Period Measurement Single Semi-Period Measurement Buffered Semi-Period Measurement Frequency Measurement Method 1Measure Low Frequency With One Counter Method 1bMeasure Low Frequency With One Counter (Averaged) Method 2Measure High Frequency With Two Counters Method 3Measure Large Range of Frequencies Using TwoCounters Page Choosing a Method for Measuring Frequency Position Measurement Measurements Using Quadrature Encoders X1 Encoding X2 Encoding X4 Encoding Channel Z Behavior Measurements Using Two Pulse Encoders Two-Signal Edge-Separation Measurement Single Two-Signal Edge-Separation Measurement Buffered Two-Signal Edge-Separation Measurement Counter Output Applications Simple Pulse Generation Single Pulse Generation with Start Trigger Retriggerable Single Pulse Generation Pulse Train Generation Continuous Pulse Train Generation Frequency Generation Using the Frequency Generator Frequency Division Counter Timing Signals Counter n Source Signal Routing a Signal to Counter n Source Routing Counter n Source to an Output Terminal Counter n Gate Signal Routing a Signal to Counter n Gate Counter n Aux Signal Routing a Signal to Counter n Aux Counter n A, Counter n B, and Counter n Z Signals Routing Signals to A, B, and Z Counter Inputs Routing Counter n Z Signal to an Output Terminal Counter n Up_Down Signal Counter n HW Arm Signal Counter n Internal Output and Counter n TC Signals Routing Counter n Internal Output to an Output Terminal Frequency Output Signal Routing Frequency Output to a Terminal Default Counter/Timer Routing Start Trigger Pause Trigger Other Counter Features Cascading Counters Counter Filters Page Prescaling Duplicate Count Prevention Example Application That Works Correctly (No Duplicate Counting) Example Application That Works Incorrectly (Duplicate Counting) Example Application That Prevents Duplicate Count When To Use Duplicate Count Prevention Enabling Duplicate Count Prevention in NI-DAQmx Synchronization Modes 80 MHz Source Mode Other Internal Source Mode External Source Mode Digital Routing and Clock Generation Clock Routing 80 MHz Timebase 20 MHz Timebase 100 kHz Timebase Specifications Analog Input Analog Output Digital Waveform Characteristics (Slots 1 through 4 Only)1 PFI Characteristics (Slots 5 and 6 Only) General-Purpose Counter/Timers (Slots 5 and 6 Only)1 Frequency Generator (Slots 5 and 6 Only) External Digital Triggers (Slots 5 and 6 or with Some AI Modules) Module I/O States Power Requirements Bus Interface Physical Characteristics Safety Standards Environmental Shock and Vibration Electromagnetic Compatibility CE Compliance Waste Electrical and Electronic Equipment (WEEE) Where to Go for Support