© National Instruments Corporation 67 NI cDAQ-9172 User Guide and Specifications
External Source Mode
In external source mode, the chassis generates a delayed Source signal by
delaying the Source signal by several nanoseconds. The NI cDAQ-9172
chassis synchronizes signals on the rising edge of the delayed Source signal
and counts on the following rising edge of the source, as shown in
Figure 48.
Figure 48. External Source Model
Digital Routing and Clock GenerationThe digital routing circuitry has the following functions:
• Manages the flow of data between the bus interface and the
acquisition/generation sub-systems (analog input, analog output,
digital I/O, and the counters). The digital routing circuitry uses FIFOs
(if present) in each sub-system to ensure efficient data movement.
• Routes timing and control signals. The acquisition/generation
sub-systems use these signals to manage acquisitions and generations.
These signals can come from the following sources:
– Your C Series I/O modules
– User input through the PFI terminals using correlated digital
C Series I/O modules in slots 5 and/or 6
• Routes and generates the main clock signals for the NI cDAQ-9172
chassis.
To determine the signal routing options for C Series I/O modules
installed in the NI cDAQ-9172 chassis, refer to the Device Routes tab
in MAX.
Source
Delayed Source
Synchronize
Count