Contents
PC-DIO-24/PnP User Manual viii
©
National Instruments Corporation
Figure 3-7. Mode 2 Timing Specification for Bidirectional Transfers.................... 3-14
Figure 4-1. PC-DIO-24/PnP Block Diagram........................................................... 4-1
Figure C-1. Control Word Formats for the 82C55A................................................C-4
Figure C-2. Port C Pin Assignments, Mode 1 Input.................................................C-13
Figure C-3. Port C Pin Assignments, Mode 1 Output..............................................C-16
Figure C-4. Port A Configured as a Bidirectional Data Bus in Mode 2...................C-17
Figure C-5. Port C Pin Assignments, Mode 2..........................................................C-19
Figure D-1. PC-DIO-24 Parts Locator Diagram.......................................................D-3
Figure D-2. Example Base I/O Address Switch Settings..........................................D-4
Figure D-3. Interrupt Enable Jumper Settings..........................................................D-6
Figure D-4. Interrupt Jumper Setting for IRQ5 (Factory Setting)............................D-6
TablesTable 3-1. Signal Descriptions................................................................................3-3
Table 3-2. Port C Signal Assignments....................................................................3-4
Table 3-3. Timing Signal Descriptions...................................................................3-10
Table C-1. PC-DIO-24/PnP Address Map ..............................................................C-3
Table C-2. Port C Set/Reset Control Words............................................................ C-5
Table C-3. Mode 0 I/O Configurations ...................................................................C-9
Table D-1. Comparison of Characteristics ..............................................................D-1
Table D-2. PC-DIO-24 Factory-Set Jumper and Switch Settings ...........................D-2
Table D-3. Example Switch Settings with Corresponding Base I/O Address
and I/O Address Space..........................................................................D-5