Appendix C Register-Level Programming
PC-DIO-24/PnP User Manual C-20
©
National Instruments Corporation
cnfg = BASE_ADDRESS + CNFGoffset;
/* EXAMPLE 1*/
outp(cnfg,0xC0); /* Port A is in mode 2. */
while (!(inp(portc) & 0x80)); /* Wait until OBFA* is set,
indicating that the data last
written to port A has been read.
*/
outp(porta,0x67); /* Write the data to port A. */
while (!(inp(portc) & 0x20)); /* Wait until IBFA is set,
indicating that data is
available in port A to be read.
*/
valread = inp(porta); /* Read data from port A. */
}
Interrupt Programming Examples for the 82C55A
The following examples show the process required to enable interrupts
for several different operating modes. The interrupt handling routines
and interrupt installation routines for the 82C55A are not included.
Consult your computer technical reference manual for additional
information. Also, if you generate interrupts with the PC3 or PC0 lines
of the 82C55A devices, you must maintain the active high level until the
interrupt service routine is entered. Otherwise, the host computer
considers the interrupt a spurious interrupt and routes the request to the
channel responsible for handling spurious interrupts. To prevent this
problem, try using some other I/O bit to send feedback to the device
generating the interrupt. In this way, the interrupting device can be
signaled that the interrupt service routine has been entered. For further
information on using PC3 and PC0 for interrupts, see the Interrupt
Handling section later in this appendix.
Note: The following code applies to the PC-DIO-24PnP. To adapt this code to the
PC-DIO-24 (non-PnP), remove the outp (ireg1) instructions and
replace outp (ireg2, 0x04) with the following (assuming you use PC4
as your interrupt enable):
outp (cnfg, 0x08) /* Clear PC4 to enable interrupts */
You cannot use PC4 as your interrupt enable in examples1, 5, or 6,
because these configurations use PC4 for handshaking.