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National Instruments PC-LPM-16/PnP , Signal Connection Descriptions

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Chapter 4 Signal Connections

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National Instruments Corporation 4-3 PC-LPM-16/PnP User Manual

Signal Connection Descriptions

Table 4-1.

Signal Connection Descriptions

Pin Signal Reference Description

1–2 AIGND N/A Analog Input Ground—The pins are

connected to the analog input ground

signal. ACH<0..15> signals should be

referenced to AIGND.

3–18 ACH<0..15> AGND Analog Input Channels 0 through 15—

These channels are single-ended.

19 DGND N/A Digital Ground—This pin supplies the

reference for the digital signals at the I/O

connector as well as the +5 VDC supply.

20 -12 V DGND -12 VDC Power Supply Output Pin—

The maximum current is 5.0 mA.

21 +12 V DGND +12 VDC Power Supply from the

Computer Bus—This power line has a

0.5 A self-resetting fuse in series.

22–29 DIN<0..7> DGND Digital Input Data Lines—These signals

are TTL-compatible, digital input lines.

DIN7 is the MSB, DIN0 the LSB.

30–37 DOUT<0..7> DGND Digital Output Data Lines—These

signals are TTL-compatible, digital

output lines. DOUT7 is the MSB,

DOUT0 the LSB.

38 OUT1* DGND Output of Counter 1—This signal

outputs the inverted programmed

waveform of counter 1.

39 EXTINT* DGND External Interrupt—This pin is used for

input of the external interrupt signal.

a.Book : h.chapter 4 Page 3 Wednesday, November 20, 1996 6:36 PM

Contents

Main Page Important Information WARNING REGARDING MEDICAL AND CLINICAL USE OF NATIONAL INSTRUMENTS PRODUCTS Trademarks Copyright Page Page Glossary Index Figures Tables About This Manual Organization of This Manual Conventions Used in This Manual National Instruments Documentation Related Documentation Customer Communication Introduction About the PC-LPM-16/PnP What You Need to Get Started LabVIEW and LabWindows/CVI Application Software Software Programming Choices NI-DAQ Driver Software Register-Level Programming Optional Equipment Custom Cables Unpacking Installation and Configuration Hardware Installation Software Installation Plug and Play Board Configuration Base I/O Address and Interrupt Selection Non-Plug and Play Theory of Operation Functional Overview Chapter 3 Theory of Operation Figure 3-1. PC-LPM-16PnP Block Diagram PC I/O Channel Interface Circuitry Analog Input and Data Acquisition Circuitry Analog Input Circuitry Data Acquisition Timing Circuitry Single-Channel Data Acquisition Data Acquisition Rates Multichannel Scanning Data Acquisition Chapter 3 Theory of Operation PC-LPM-16/PnP User Manual 3-8 Digital I/O Circuitry Digital I/O Circuitry Block Diagram Figure 3-4. Timing I/O Circuitry Page Signal Connections I/O Connector Chapter 4 Signal Connections Figure 4-1. PC-LPM-16PnP I/O Connector Pin Assignments Signal Connection Descriptions Page Analog Input Signal Connections Connections for Signal Sources Digital I/O Signal Connections Power Connections Power Rating Data Acquisition Timing Connections Timing Connections General-Purpose Timing Signal Connections and General-Purpose Counter Timing Signals Page Page Page Specifications A Transfer Characteristics PC-LPM-16PnP Board Amplifier Characteristics Digital I/O Stability Dynamic Characteristics Timing I/O Bus Interface Explanation of Analog Input Specifications Environment Physical Page Page B MSM82C53 Data Sheet Page Page Page Page Page Page Page Page Page Page Page Using Your PC-LPM-16 (Non-PnP) Board C the PC-LPM-16 Differences between the PC-LPM-16PnP and Page Page Configuration and Installation of the Board Configuration PC-LPM-16 (non-PnP) Page Base I/O Address Selection Page Page Interrupt Selection Analog Input Jumper Settings 5 V) Bipolar Input Selection 1 ( Bipolar Input Selection 2 ( Unipolar Input Selection 1 (0 to 10 V) Select the bipolar ( 2.5 V) 2.5 V) input configuration by setting jumpers W1 and W2 as shown in Figure C-6. Unipolar Input Selection 2 (0 to 5 V) Installation Register-Level Programming D Register Map Base Address Register Size Register Descriptions Register Description Format Configuration and Status Register Group Page Page Page Command Register 2 Command Register 2 Command Register 3 Status Register 1 Status Register 1 Page Status Register 2 Analog Input Register Group A/D FIFO Low-Byte Register and A/D FIFO High-Byte Register A/D FIFO Low-Byte Register and A/D FIFO High-Byte Register A/D Clear Register Counter/Timer (MSM82C53) Register Group Counter 0 Data Register Counter 1 Data Register Counter 2 Data Register Page Page Page Timer Interrupt Clear Register Digital I/O Register Group Digital Output Register Digital Input Register Programming Considerations Register Programming Considerations Initializing the PC-LPM-16/PnP Programming the A/D Calibration Programming the Analog Input Circuitry Analog Input Circuitry Programming Sequence A/D FIFO Output Binary Modes Clearing the Analog Input Circuitry Programming Multiple A/D Conversions on a Single Input Channel Using Counter 0 Page Page Programming Multiple A/D Conversions Using External Timing Programming Multiple A/D Conversions with Channel Scanning A/D Interrupt Programming Programming the Digital I/O Circuitry Programming the MSM82C53 Counter/Timer Customer Communication FTP Support Electronic Services E Bulletin Board Support Telephone and Fax Support Telephone Fax Fax-on-Demand Support E-Mail Support (currently U.S. only) Technical Support Form PC-LPM-16/PnP Hardware and Software Configuration Form Other Products National Instruments Products Documentation Comment Form Glossary Symbols A C B Page Page T V A Numbers Index B C D E I H F G J P N M O R S T U