National Instruments PC-LPM-16/PnP - page 67

Appendix C Using Your PC-LPM-16 (Non-PnP) Board



National Instruments Corporation C-7 PC-LPM-16/PnP User Manual

Each switch in U26 corresponds to one of the address lines A9 through

A5. Slide the switch to the side labeled

A9

to

A5

to select a binary value

of

zero

for the corresponding address bit. Slide the switch to the side of

the switch labeled

ON

to select a binary value of

one

for the

corresponding address bit. Figure C-2 shows two possible switch

settings.

Figure C-2.

Example Base I/O Address Switch Settings

The PC-LPM-16 decodes the five LSBs of the address (A4 through A0)

to select the appropriate PC-LPM-16 register. To change the base I/O

address:

1. Remove the plastic cover on U26.

2. Slide each switch to the desired position.

3. Check each switch to verify that the switch is pressed entirely to the

side.

4. Replace the plastic cover.

Note the new PC-LPM-16 base I/O address for use when configuring

the PC-LPM-16 software in the

Hardware and Software Configuration

Form

in Appendix E,

Customer Communication

. Table C-3 lists the

–Slide to this side for 1–Slide to this side for 0

a. Switches Set to Base I/O Address of Hex 000

b. Switches Set to Base I/O Address of Hex 260 (Factory Setting)

U26

A9

A8

A7

A6

A5

–Slide to this side for 1–Slide to this side for 0

U26

A9

A8

A7

A6

A5

Contents

Main Page Important Information WARNING REGARDING MEDICAL AND CLINICAL USE OF NATIONAL INSTRUMENTS PRODUCTS Trademarks Copyright Page Page Glossary Index Figures Tables About This Manual Organization of This Manual Conventions Used in This Manual National Instruments Documentation Related Documentation Customer Communication Introduction About the PC-LPM-16/PnP What You Need to Get Started LabVIEW and LabWindows/CVI Application Software Software Programming Choices NI-DAQ Driver Software Register-Level Programming Optional Equipment Custom Cables Unpacking Installation and Configuration Hardware Installation Software Installation Plug and Play Board Configuration Base I/O Address and Interrupt Selection Non-Plug and Play Theory of Operation Functional Overview Chapter 3 Theory of Operation Figure 3-1. PC-LPM-16PnP Block Diagram PC I/O Channel Interface Circuitry Analog Input and Data Acquisition Circuitry Analog Input Circuitry Data Acquisition Timing Circuitry Single-Channel Data Acquisition Data Acquisition Rates Multichannel Scanning Data Acquisition Chapter 3 Theory of Operation PC-LPM-16/PnP User Manual 3-8 Digital I/O Circuitry Digital I/O Circuitry Block Diagram Figure 3-4. Timing I/O Circuitry Page Signal Connections I/O Connector Chapter 4 Signal Connections Figure 4-1. PC-LPM-16PnP I/O Connector Pin Assignments Signal Connection Descriptions Page Analog Input Signal Connections Connections for Signal Sources Digital I/O Signal Connections Power Connections Power Rating Data Acquisition Timing Connections Timing Connections General-Purpose Timing Signal Connections and General-Purpose Counter Timing Signals Page Page Page Specifications A Transfer Characteristics PC-LPM-16PnP Board Amplifier Characteristics Digital I/O Stability Dynamic Characteristics Timing I/O Bus Interface Explanation of Analog Input Specifications Environment Physical Page Page B MSM82C53 Data Sheet Page Page Page Page Page Page Page Page Page Page Page Using Your PC-LPM-16 (Non-PnP) Board C the PC-LPM-16 Differences between the PC-LPM-16PnP and Page Page Configuration and Installation of the Board Configuration PC-LPM-16 (non-PnP) Page Base I/O Address Selection Page Page Interrupt Selection Analog Input Jumper Settings 5 V) Bipolar Input Selection 1 ( Bipolar Input Selection 2 ( Unipolar Input Selection 1 (0 to 10 V) Select the bipolar ( 2.5 V) 2.5 V) input configuration by setting jumpers W1 and W2 as shown in Figure C-6. Unipolar Input Selection 2 (0 to 5 V) Installation Register-Level Programming D Register Map Base Address Register Size Register Descriptions Register Description Format Configuration and Status Register Group Page Page Page Command Register 2 Command Register 2 Command Register 3 Status Register 1 Status Register 1 Page Status Register 2 Analog Input Register Group A/D FIFO Low-Byte Register and A/D FIFO High-Byte Register A/D FIFO Low-Byte Register and A/D FIFO High-Byte Register A/D Clear Register Counter/Timer (MSM82C53) Register Group Counter 0 Data Register Counter 1 Data Register Counter 2 Data Register Page Page Page Timer Interrupt Clear Register Digital I/O Register Group Digital Output Register Digital Input Register Programming Considerations Register Programming Considerations Initializing the PC-LPM-16/PnP Programming the A/D Calibration Programming the Analog Input Circuitry Analog Input Circuitry Programming Sequence A/D FIFO Output Binary Modes Clearing the Analog Input Circuitry Programming Multiple A/D Conversions on a Single Input Channel Using Counter 0 Page Page Programming Multiple A/D Conversions Using External Timing Programming Multiple A/D Conversions with Channel Scanning A/D Interrupt Programming Programming the Digital I/O Circuitry Programming the MSM82C53 Counter/Timer Customer Communication FTP Support Electronic Services E Bulletin Board Support Telephone and Fax Support Telephone Fax Fax-on-Demand Support E-Mail Support (currently U.S. only) Technical Support Form PC-LPM-16/PnP Hardware and Software Configuration Form Other Products National Instruments Products Documentation Comment Form Glossary Symbols A C B Page Page T V A Numbers Index B C D E I H F G J P N M O R S T U