National Instruments RT Series Figure3-3. RT Series Processor Board Diagram

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Chapter3 HardwareOverview

©NationalInstruments Corporation 3-3 RTSeries DAQ DeviceUser Manual

Figure3-3. RT Series Processor Board Diagram

EmbeddedISA Bus

EmbeddedCPU Bus

ProcessorBoard

BIOS ISABridge

Controller

Shared

Memory

CPU

I/ODaughterboard

SRAM/DRAM

SharedMemory

Interface

BIOS

Extension

CacheMemory

PCIController

HostPCI Bus

EmbeddedPCI Bus

MITE

Contents

Main Page Important Information Warranty Copyright Trademarks WARNINGREGARDING USE OF NATIONAL INSTRUMENTS PRODUCTS Compliance FCC/Canada Radio Frequency Interference Compliance* Determining FCC Class FCC/DOC Warnings Class A European Union - Compliance to EEC Directives Contents Page About This Manual Conventions Related Documentation Introduction About the RT Series What You Need to Get Started Unpacking Software Programming Choices Installation and Configuration Installing the Hardware PCI Installation PXI Installation Board Configuration Page Page Hardware Overview Processor Board Figure3-3. RT Series Processor Board Diagram DAQ Daughterboard Host to RT Series DAQ Device Communication RTSI LEDs LabVIEW RT Programming Targeting LabVIEW RTand Downloading VIs Resetting the RT Series DAQ Device Creating Stand-Alone Executables Embedded Applications Command-Line Arguments Programming LabVIEW RT Real-Time Programming Running a VI at Time-Critical Priority without the RT Development System Use of Shared Memory Configuration Issues RT Series D AQ VIs A Specifications Page B Technical Support Resources Web Support NI Developer Zone Customer Education System Integration Worldwide Support Glossary B C D Page Page Index B C D E M N P R