Chapter 6 NI-VXI Configuration Utility
VXI/VME-PCI8022 for Solaris 6-10
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National Instruments Corporation
If the windows both map to the shared RAM destination but the byte
order is different, the base of each inward window maps to the base of
the shared RAM destination. This results in one half of the window
accessing the system RAM in Little Endian byte order and the other half
accessing it in Big Endian byte order.
Caution: There is a potential problem when opening up a shared memory region to
point to system RAM. The PCI bus may return a retry on any cycle into
system RAM. As a consequence, an external VXI/VME device accessing
the system RAM may get a VXI/VME retry back. If the external VXI/VME
device does not support VXI/VME retry, the VXI/VME device will falsely
detect the retry condition as a bus error condition.
VXI/VME devices that support retries will not have this problem, because
they can handle VXI/VME retry conditions correctly by automatically
retrying the access. For example, the National Instruments VXI-DAQ
boards handle VXI/VME retry conditions properly, and do not exhibit this
problem.
Resource Manager Delay
The only option under the Resource Manager portion of the Logical
Address Configuration Editor is the Resource Manager Delay control.

Resource Manager Delay

Note: This field is effective only when the PCI-MXI-2 is at its default logical
address of 0. The PCI-MXI-2 is the Resource Manager only if its logical
address is 0.
This field specifies the time in seconds that the Resource Manager (RM)
waits before accessing any other VXI/VMEbus device’s A16
configuration registers.
RM Delay Range Default Value
0 to 65535 s 5
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