National Instruments VXI-MIO Series user manual - page 8

Table of Contents
 National Instruments Corporation ix VXI-MIO Series User Manual
Figure 4-1. I/O Connector Pin Assignment for the VXI-MIO-64E-1 and
VXI-MIO-64XE-10................................................................................ 4-2
Figure 4-2. VXI-MIO Series PGIA ............................................................................4-10
Figure 4-3. Summary of Analog Input Connections .................................................. 4-13
Figure 4-4. Differential Input Connections for Ground-Referenced Signals .............4-15
Figure 4-5. Differential Input Connections for Nonreferenced Signals .....................4-16
Figure 4-6. Single-Ended Input Connections for Nonreferenced or Floating
Signals.....................................................................................................4-19
Figure 4-7. Single-Ended Input Connections for Ground-Referenced Signal ............4-20
Figure 4-8. Analog Output Connections .....................................................................4-21
Figure 4-9. Digital I/O Connections ...........................................................................4-22
Figure 4-10. Timing I/O Connections ..........................................................................4-24
Figure 4-11. Typical Posttriggered Acquisition ...........................................................4-25
Figure 4-12. Typical Pretriggered Acquisition .............................................................4-26
Figure 4-13. SCANCLK Signal Timing .......................................................................4-26
Figure 4-14. EXTSTROBE* Signal Timing ................................................................4-27
Figure 4-15. TRIG1 Input Signal Timing .....................................................................4-28
Figure 4-16. TRIG1 Output Signal Timing .................................................................. 4-28
Figure 4-17. TRIG2 Input Signal Timing .....................................................................4-29
Figure 4-18. TRIG2 Output Signal Timing .................................................................. 4-29
Figure 4-19. STARTSCAN Input Signal Timing .........................................................4-30
Figure 4-20. STARTSCAN Output Signal Timing ...................................................... 4-31
Figure 4-21. CONVERT* Input Signal Timing ...........................................................4-32
Figure 4-22. CONVERT* Output Signal Timing .........................................................4-33
Figure 4-23. SISOURCE Signal Timing ......................................................................4-34
Figure 4-24. WFTRIG Input Signal Timing .................................................................4-35
Figure 4-25. WFTRIG Output Signal Timing .............................................................. 4-35
Figure 4-26. UPDATE* Input Signal Timing ..............................................................4-37
Figure 4-27. UPDATE* Output Signal Timing ............................................................4-37
Figure 4-28. UISOURCE Signal Timing ......................................................................4-38
Figure 4-29. GPCTR0_SOURCE Signal Timing .........................................................4-39
Figure 4-30. GPCTR0_GATE Signal Timing in Edge-Detection Mode .....................4-40
Figure 4-31. GPCTR0_OUT Signal Timing ................................................................4-40
Figure 4-32. GPCTR1_SOURCE Signal Timing .........................................................4-41
Figure 4-33. GPCTR1_GATE Signal Timing in Edge-Detection Mode .....................4-42
Figure 4-34. GPCTR1_OUT Signal Timing ................................................................4-43
Figure 4-35. GPCTR Timing Summary .......................................................................4-43
Figure B-1. 68-Pin MIO Connector Pin Assignments ................................................B-2
Figure B-2. 68-Pin Extended Analog Input Connector Pin Assignments ...................B-3