INTRODUCTION
Hardware Architecture
Reduced Hardware with IP-based Architecture
The DtermIPs, Dterm Softphone and IP-BS connected to the LAN do not require any special interface cards* because they can be interfaced directly with the LAN and connected with peer-to-peer basis. When the DtermIP, Dterm Softphone or IP-BS is connected to a station/trunk that is using TSW, the speech path between LAN and TSW is made via IP PAD under the call processing control of the MP. The DtermIP, Dterm Softphone or IP-BS can be expanded simply adding the terminal itself. With this system architecture, the hardware such as DLC, CSI, CSH, PIM, Power Supply etc. is reduced and easy moves, adds, and changes can be realized.
Standard TDM Hardware | Peer-to-Peer IP Hardware |
Line & Trunk Cards | IP PAD |
Application Processors | (8IPLA, 24IPLA, 32IPLA, 16VCT) |
Firmware Processors | Ether Card (M606) |
| |
Powerful, One-board Main Processor (MP) with Integrated Functionality
The NEAX 2000 IPS Main Processor (MP) is the heart of pure IP connections and TDM-based connections. The MP employs a high-speed CPU, which is equivalent with Pentium. With this processing power and System On Chip (SOC) technology, the MP integrates Device Registration Server (DRS), AP01 (OAI) functions, which are provided by an additional card in the previous M100MX*. Also, by means of today’s advanced LSI technology, the MP card size is minimized and On-board Ethernet Interface card is mounted on the MP without using an additional slot space in the PIM. This interface card is linked with LAN for call control processing of DtermIP and inter-work with MATWorX and OAI server.
Enhanced Built-in Firmware Processor (FP) on MP
The NEAX 7400 ICS M100MX* requires the FP card in PIM0 when the system is configured with 3 or more PIMs. In case of the NEAX 2000 IPS, the FP in PIM0 is not required since the Built-in FP function in new MP has been improved and it provides more call processing capability. (FP is used in PIM2, 4 and 6.)
* DLC, CSI and CS handler.
ND-91649(E) | CHAPTER 1 |
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