Technical Description
Interrupt control
When enabled interrupts are generated on A10 and A20 (Pin 47 on each 50 pin header), for this reason to use interrupts on a Port its A byte must be set as an input.
IRQENX | interrupt enable |
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| 1 = enabled |
| 0 = disabled ( 0 on power up ) | ||||||
IRQCX0 |
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| Interrupt mode select see table | ||||||||
IRQCX1 |
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| Interrupt mode select see table | ||||||||
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Interrupt mode select table |
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| IRQCX1 |
| IRQCX0 | INT Type |
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| 0 |
| 0 |
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| Low level |
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| 0 |
| 1 |
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| High level |
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| 1 |
| 0 |
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| Falling edge |
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| 1 |
| 1 |
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| Rising edge |
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Interrupt Read |
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reading this port clears the interrupt |
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IRQST1 |
| (D0) Interrupt status |
| 1 = interrupt pending, 0 = none |
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IRQST2 |
| (D4) Interrupt status |
| 1 = interrupt pending, 0 = none |
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Figure 14-Interrupt Read
| Page 21 |