2001 Jul 23 11
Philips Semiconductors Preliminary specification
Power amplifier with load detection and
auto BTL/SE selection TDA8586
CHARACTERISTICS
VP= 14.4 V; Tamb =25°C; fi= 1 kHz; RL=; measured in test circuit of Fig.8; unless otherwise specified.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Supplies
VPoperating supply voltage 8.0 14.4 18 V
Iq(tot) total quiescent current SE mode 140 170 mA
Istb standby current 1 100 µA
VODC output voltage VP= 14.4 V 7.0 V
VP(mute) low supply voltage mute 6.0 7.0 8.0 V
Vosingle-ended and bridge-tied
load output voltage VP= 14.4 V; RL=4
mute condition −−20 mV
on condition −���100 mV
VIDC input voltage VP= 14.4 V 4.0 V
PIN MSO
VMSO voltage at pin MSO standby condition 0 0.8 V
mute condition; note 1 2.0 3.0 4 V
on condition 8.0 10.5 V
IMSO input current mute pin at standby condition;
VMSO < 0.8 V 540µA
Diagnostic; output buffer (open-collector); see Figs 7 to 8
VDIAG(L) diagnostic output voltage LOW Isink =1mA 0.3 0.8 V
ILI leakage current VDIAG = 14.4 V −−1µA
V
DIAG(or) diagnostic override voltage in mute mode after load
detection 10.5 18 V
VDIAG(4ch) diagnostic 4 channel indication
voltage mute, after load detection with
4 speakers connected 0.3 0.8 V
CD2 clip detector LOW THD mode; VDIAG >3V;
R=10k0.5 2 3.5 %
CD10 clip detector HIGH THD mode (default);
VDIAG >3V; R=10k71013%
CLIP DETECT CONTROL PIN
VDDDSEL voltage at DDD select pin to
obtain: 10% DDD 0 1V
2% DDD 3 6V
I
DDDSEL Input current DDD select pin VDDDSEL =5V 15 140 µA
Stereo BTL application (see Fig.7)
THD total harmonic distortion fi= 1 kHz; Po= 1 W; RL=4Ω− 0.05 0.15 %
45 Hz < fi< 10 kHz; Po=1W;
R
L=4; filter: f < 30 kHz 0.3 %
Pooutput power VP= 14.4 V; RL=4; note 2
THD = 0.5% 14 15 W
THD = 10% 17 21 W