Philips UDA1325

1999 May 10 40

Philips Semiconductors Preliminary speciﬁcation

Universal Serial Bus (USB) CODEC UDA1325

AC CHARACTERISTICS

VDDE = 5.0 V; VDDI = 3.3 V; Tamb =25°C; fosc= 48 MHz; fs= 44.1 kHz; unless otherwise speciﬁed.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Driver characteristics D+ and D− (full-speed mode)

fo(s) audio sample output frequency 5 −55 kHz

trrise time CL=50pF 4 −20 ns

tffall time CL=50pF 4 −20 ns

trf(m) rise/fall time matching (tr/tf)90−110 %

Vcr output signal crossover voltage 1.3 −2.0 V

Ro(drive) driver output resistance steady-state drive 28 −43 Ω

Data source timings D+ and D− (full-speed mode)

fi(s) audio sample input frequency 5 −55 kHz

ffs(D) full speed data rate 11.97 12.00 12.03 Mbits/s

tfr(D) frame interval 0.9995 1.0000 1.0005 ms

tJ1(diff) source differential jitter to next

transition

−3.5 0.0 +3.5 ns

tJ2(diff) source differential jitter for paired

transitions

−4.0 0.0 +4.0 ns

tW(EOP) source end of packet width 160 −175 ns

tEOP(diff) differential to end of packet

transition skew

−2.0 −+5.0 ns

tJR1 receiver data jitter tolerance to next

transition

−18.5 0.0 +18.5 ns

tJR2 receiver data jitter tolerance for

paired transitions

−9.0 0.0 +9.0 ns

tEOPR1 end of packet width at receiver

must reject as end of packet 40 −−ns

tEOPR2 end of packet width at receiver

must accept as end of packet 82 −−ns

Serial input/output data timing

fssystem clock frequency −12 −MHz

fi(WS) word selection input frequency 5 −55 kHz

trrise time −−20 ns

tffall time −−20 ns

tBCK(H) bit clock HIGH time 55 −−ns

tBCK(L) bit clock LOW time 55 −−ns

ts;DAT data set-up time 10 −−ns

th;DAT data hold time 20 −−ns

ts;WS word selection set-up time 20 −−ns

th;WS word selection hold time 10 −−ns