EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00
5
2. CONFIGURATION S3F401FX
JTAG
POWERBLOCK
Page 1-6
IMC1HEADER CONN ECTOR
Page 1-11
MODESETTING BLOCK
Page 1-7
UART BLOCK
Page1-8
IMC0 HEADERCONNECTOR
Page 1-11
Main OSC
7-SEGMENT
Page 1-10
Buzzer
12-bit ADC BLOCK
Page 1-12
SSPBLOCK
Page1-9
Figure 2. S3F401F Evaluation Board Top-view