Sanyo VPC X 360 E, VPC-X360, VPC-X360EX 1-1. CA-1CIRCUIT DESCRIPTION, 1. IC Configuration, 2.IC903 (CCD), 1. OUTLINE OF CIRCUIT DESCRIPTION, Pin No, Symbol, Voltage, Waveform, [Features], [Structure]

1. OUTLINE OF CIRCUIT DESCRIPTION

1-1. CA-1 CIRCUIT DESCRIPTION

1. IC Configuration

IC903 (ICX204AK)	CCD imager
IC902 (74VHC04MTC)	H driver
IC904 (CXD1267AN)	V driver
IC905 (AD9802)	CDS/AGC, A/D converter

2.IC903 (CCD)

[Structure]

Interline type CCD image sensor

Optical size	1/3 inch format
Effective pixels	1034	(H) × 779 (V)
Pixels in total	1077	(H) × 788 (V)
Chip size	5.80 mm (H) × 4.92 mm (V)
Unit cell size	4.65 μ m (H) × 4.65 μ m (H)
Optical black

Horizontal (H) direction: Front 3 pixels, Rear 40 pixels

Vertical (V) direction:	Front 7 pixels, Rear 2 pixels
Dummy bit number	Horizontal : 29 Vertical : 1

[Features]

Independent storage and retrieval for each pixel Square pixel unit cell

XGA compatible

R, G, B primary color mosaic filter

Continuous variable speed electronic shutter function

	Pin 1
	2
V
	8
2
H	34
Pin 9

Fig. 1-1.Optical Black Location (Top View)

Pin No.	Symbol	Pin Description	Waveform	Voltage
1	V φ 3	Vertical shift register gate clock		-7.5 V, 0 V
2	V φ 2B	Vertical shift register gate clock		-7.5 V, 0 V, 15 V
3	V φ 1	Vertical shift register gate clock		-7.5 V, 0 V
4	V φ 2A	Vertical shift register gate clock		-7.5 V, 0 V, 15 V
5, 6, 7, 10	GND	GND
8	OS	Image output
9	OD	Output transister drain		15 V
11	φ SUB	Board clock		Amplitude 22.5 V Ex. 6 V (Bias
				level is different from every CCD)
12	OSUB	Board bias	DC	(Different from every CCD) Ex. 6V
13	PL	Protection transistor bias	DC	-7.5 V
14	φ RS	Reset transister gate clock		Amplitude 3.5 V Ex. 5 V, 10 V
				(Different from every CCD)
15	φ H1	Horizontal shift register transfer clock		0 V, 3.5 V
16	φ H2	Horizontal shift register transfer clock		0 V, 3.5 V
		Table 1-1. CCD Pin Description		When sensor read-out

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