4th Generation USB 2.0 Flash Media Controller with Integrated Card Power FETs & HS Hub

Datasheet

 

 

BUFFER

 

NAME

SYMBOL

TYPE

DESCRIPTION

 

 

 

 

SM

SM_nCE

O8PU

This pin is the active low chip enable signal to the SM

Chip Enable

 

 

device.

 

 

 

When using the internal FET, this pin has an internal

 

 

 

weak pull-up resistor that is tied to the output of the

 

 

 

internal Power FET.

 

 

 

 

 

 

08

If an external FET is used (Internal FET is disabled),

 

 

 

then the internal pull-up is not available (external pull-

 

 

 

ups must be used, and should be connected to the

 

 

 

applicable Card Power Supply).

 

 

 

 

SM

SM_nCD

IPU

This is the card detection signal from SM device to

Card Detection

 

 

indicate if the device is inserted.

 

 

 

This pin has an internally controlled weak pull-up

 

 

 

resistor.

 

 

 

 

 

 

MEMORY STICK INTERFACE

 

 

 

 

MS

MS_BS

O8

This pin is connected to the BS pin of the MS device.

Bus State

 

 

It is used to control the Bus States 0, 1, 2 and 3 (BS0,

 

 

 

 

 

 

BS1, BS2 and BS3) of the MS device.

 

 

 

 

MS

MS_SDIO/MS_

I/O8PD

This pin is a bi-directional data signal for the MS device.

System

D0

 

Most significant bit (MSB) of each byte is transmitted

Data In/Out

 

 

 

 

 

first by either MSC or MS device.

 

 

 

The bi-directional data signal has an internal weak pull-

 

 

 

down resistor.

 

 

 

 

MS

MS_D1

I/O8PD

This pin is a bi-directional data signal for the MS device.

System Data In/Out

 

 

This pin has internally controlled weak pull-up and pull-

 

 

 

 

 

 

down resistors for various operational modes.

 

 

 

 

MS

MS_D[3:2]

I/O8PD

This pin is a bi-directional data signal for the MS device.

System

 

 

The bi-directional data signal has an internal weak pull-

Data In/Out

 

 

 

 

 

down resistor.

MS

MS_INS

IPU

This pin is the card detection signal from the MS device

Card Insertion

 

 

to indicate, if the device is inserted.

 

 

 

This pin has an internally controlled weak pull-up

 

 

 

resistor.

 

 

 

 

MS

MS_SCLK

O8

This pin is an output clock signal to the MS device.

System CLK

 

 

The clock frequency is software configurable.

 

 

 

 

 

 

 

 

 

SD INTERFACE

 

 

 

 

SD

SD_DAT[3:0]

I/O8PU

These are bi-directional data signals.

Data [3:0]

 

 

These pins have internally controlled weak pull-up

 

 

 

 

 

 

resistors.

 

 

 

 

SD Clock

SD_CLK

O8

This is an output clock signal to SD/MMC device.

 

 

 

The clock frequency is software configurable.

 

 

 

 

SMSC USB2601/USB2602

17

Revision 1.6 (06-20-08)

 

DATASHEET