USB 2.0 Flash Drive Controller
Datasheet
Chapter 6 Pin Descriptions
This section provides a detailed description of each signal. The signals are arranged in functional groups according to their associated interface.
The “n” symbol in the signal name indicates that the active, or asserted state occurs when the signal is at a low voltage level. When “n” is not present before the signal name, the signal is asserted when at the high voltage level.
The terms assertion and negation are used exclusively. This is done to avoid confusion when working with a mixture of “active low” and “active high” signal. The term assert, or assertion indicates that a signal is active, independent of whether that level is represented by a high or low voltage. The term negate, or negation indicates that a signal is inactive.
Table 6.1 – USB97C242 Pin Descriptions
|
|
|
| BUFFER |
|
|
|
| NAME |
| SYMBOL | TYPE | DESCRIPTION |
|
|
|
|
|
| NAND FLASH/SMARTMEDIA INTERFACE |
|
| |
| SM |
| nWP | O12 | This pin is an active low write protect signal for the SM or NAND flash |
| |
| Write |
|
|
| device. |
|
|
| Protect |
|
|
|
|
|
|
| SM |
| ALE | O12 | This pin is an active high Address Latch Enable signal for the SM or |
| |
| Address |
|
|
| NAND flash device. |
|
|
| Strobe |
|
|
|
|
|
|
| SM |
| CLE | O12 | This pin is an active high Command Latch Enable signal for the SM or |
| |
| Command |
|
|
| NAND flash device. |
|
|
| Strobe |
|
|
|
|
|
|
| SM |
| D[7:0] | I/OPU12 | These pins are the |
|
|
|
|
|
|
|
|
| |
|
|
|
|
| The |
| |
|
|
|
|
| resister on the input. |
|
|
| SM |
| nRE | O24 | This pin is an active low read strobe signal for SM or NAND flash device. |
| |
| Read |
|
|
|
|
|
|
| Enable |
|
|
|
|
|
|
| SM |
| nWE | O12 | This pin is an active low write strobe signal for SM or NAND flash device. |
| |
| Write |
|
|
|
|
|
|
| Enable |
|
|
|
|
|
|
| SM |
| nWPS | IPU | A |
|
|
| Write |
|
|
|
|
|
|
| Protect |
|
|
| This pin has an internal weak |
|
|
| Switch |
|
|
|
|
|
|
| SM |
| nB/R | IPU | This pin is connected to the BSY/RDY pin of the SM or NAND flash |
| |
| Busy or |
|
|
| device. |
|
|
| Data Ready |
|
|
|
|
|
|
|
|
|
|
| This pin has an internal weak |
|
|
| SM |
| nCE | OPU8 | This pin is the active low chip enable signal to the SM or NAND flash |
| |
| Chip |
|
|
| device. |
|
|
| Enable |
|
|
|
|
|
|
|
|
|
|
| This pin should be used to support a single SM or NAND flash device |
| |
|
|
|
|
| only. |
|
|
SMSC USB97C242 |
|
| Page 12 | Revision 1.4 |
DATASHEET