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75 |
| NC | O | Not used (open) |
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76 |
| I | Battery detect signal input from the SONY bus interface (IC600) and battery detect circuit | ||||||||
| “L” is input at low voltage |
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77, 78 |
| NC | O | Not used (open) |
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79 | KEYACK | I | Input of acknowledge signal for the key entry | Acknowledge signal is input to accept function | |||||||
and eject keys in the power off status | On at input of “H” |
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80 | I | Telephone muting signal input terminal | At input of “H”, the signal is attenuated by | ||||||||
Used for the | |||||||||||
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| FM stereo broadcasting detection signal input from the FM/AM tuner unit (TU1), or forced | ||||||
81 | I/O | monaural control signal output to the FM/AM tuner unit (TU1) |
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| “L” is input in the FM stereo mode, or “L” is output in the forced monaural mode | ||||||
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| Seek control signal output to the FM/AM tuner unit (TU1) |
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82 | SEEKOUT | O | AM mode: Used for IF count output/SD output request/AGC cut at SEEK or BTM | ||||||||
FM mode: Used for SD speed up at SEEK, BTM, or AF |
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| “L” is output at tuner off |
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83 |
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| I | Station detector detect input from the FM/AM tuner unit (TU1) |
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| Stop level for SEEK, BTM, etc. is determined | SD is present at input of “H” | |||||||||
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84 |
| MONO | O | Not used (open) |
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85 |
| PLL CE | O | PLL serial chip enable signal output terminal | Not used (open) |
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86 |
| HSTX | I | Hardware standby input terminal | “L”: hardware standby mode Reset signal input in this set | ||||||
87 |
| MD2 | I | Setting terminal for the CPU operational mode (fixed at “L” in this set) | |||||||
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88 |
| MD1 | I | Setting terminal for the CPU operational mode (fixed at “H” in this set) | |||||||
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89 |
| MD0 | I | Setting terminal for the CPU operational mode (fixed at “H” in this set) | |||||||
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90 |
| RESET | I | System reset signal input from the reset signal generator (IC801) and reset switch (S900) | |||||||
| “L”: reset | “L” is input for several 100 msec after power on, then it changes to “H” | |||||||||
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91 |
| VSS | — | Ground terminal |
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92 |
| X0 | I | Main system clock input terminal (3.68 MHz) |
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93 |
| X1 | O | Main system clock output terminal (3.68 MHz) |
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94 |
| VCC | — | Power supply terminal (+5V) |
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95 |
| I | Power select switch input terminal | “L”: off (halt mode), “H”: on (operation mode) | |||||||
Not used (open) |
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96 | POL MONO | I | Polar monaural detection signal input terminal | Not used (open) |
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97 to 99 |
| NC | O | Not used (open) |
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| Frequency select switch (S701) input terminal |
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100 |
| I | “L”: MW10k step/FM 200k step, “H”: MW 9k step/FM 50k step |
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| Used for the E model only (Except E models: fixed at “H”) |
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101 |
| NC | O | Not used (open) |
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| Internal RAM reset detection signal input from the RN5VD23AA (IC802) | ||||||
102 |
| RAMBU | I | Input terminal to check that RAM data are not destroyed due to low voltage | |||||||
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| This checking is made within 100 msec after reset |
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103 |
| NC | O | Not used (open) |
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104 |
| LCD CE | O | Chip enable signal output to the liquid crystal display driver (IC801) | “H” active | ||||||
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105 |
| I | Internal flash memory data write mode detection signal input terminal | “L”: data write mode | |||||||
Not used (fixed at “H” in this set) |
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106 |
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| I | Dial pulse input of the rotary encoder (EN801) |
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107 |
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| I | (for VOLUME/BASS/TREBLE/BALANCE/FADER control) |
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108 | LAMP ON | O | Power on/off control signal output of the illumination LED and liquid crystal display driver | ||||||||
| (ILL ON) | (IC801) | “H”: power on |
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109 |
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| O | Main system power supply on/off control signal output to the BA3918 (IC800) “H”: power on | |||||||
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110 |
| O | FM system power supply on/off control signal output to the BA3918 (IC800) | ||||||||
| “L”: AM power on, “H”: FM power on |
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– 70 –