•IC601 CXD2671-203GA (SYSTEM CONTROL)

Pin No.

Pin Name

I/O

Description

1

PAUSE KEY

I

Not used (open)

 

 

 

 

2

NC

—

Not used (open)

 

 

 

 

3

XTEST

I

Input terminal for the test mode detection

 

 

 

 

4, 5

NC

—

Not used (open)

6

MCUVDD0

—

Power supply (for microcomputer block)

 

 

 

 

7

MIFVSS3

—

Ground (for microcomputer I/F)

8

XRST

I

System reset terminal

 

 

 

 

9

S MON

I

Servo signal monitor

 

 

 

 

10

VB MON

I

Voltage monitor of UNREG power supply

11

CHG MON

I

Not used (connected to ground)

 

 

 

 

12

VREF MON

I

Clear reference voltage monitor

13

SET KEY 1

I

Set key detection 1

14

SET KEY 2

I

Not used (connected to RMC VDD)

 

 

 

 

15

VL MON

I

VL voltage monitor

16

HIDC MON

I

Not used (connected to ground)

 

 

 

 

17

WK DET

I

Set KEY WAKE detection

18

REC KEY

I

Not used (connected to RMC VDD)

 

 

 

 

19

HALF LOCK SW

I

Signal input for OPEN SW detection

20

RMC KEY

I

Remote control key detection

 

 

 

 

21

AVDD

—

Power supply (for the analog circuit block)

 

 

 

 

22

AVSS

—

Ground (for the analog circuit block)

23

VDIOSC

—

Power supply (for OSC cell)

 

 

 

 

24

OSCI

I

Input to the X’tal oscillator circuit

25

OSCO

O

Output from the X’tal oscillator circuit

 

 

 

 

26

VSIOSC

—

Ground (for OSC cell)

 

 

 

 

27

DAVDD

—

Built-in DAC VCC

28

VREFL

—

Built-in DAC VREF (L-ch)

 

 

 

 

29

AOUTL

O

Built-in DAC (L-ch) output

30

AOUTR

O

Built-in DAC (R-ch) output

 

 

 

 

31

VREFR

I

Built-in DAC VREF (R-ch)

32

DAVSS

—

Ground (for the built-in DAC)

 

 

 

 

33

ASYO

O

Playback EFM duplex signal output

 

 

 

 

34

ASYI

I

Playback EFM comparison slice level input

35

AVD1

—

AVDD

 

 

 

 

36

BIAS

I

Bias input for the playback EFM comparison

37

RFI

I

Playback EFM RF signal input

 

 

 

 

38

AVS1

—

AVSS

39

PCO

O

Phase comparison output for the playback EFM system master PLL

40

PDO

O

Phase comparison output for the analog PLL

 

 

 

 

41

FILI

I

Filter input for the playback EFM system master PLL

42

FILO

O

Filter output for the playback EFM system master PLL

 

 

 

 

43

CLTV

I

Internal VCO control voltage input for the playback EFM system master PLL

44

PEAK

I

Peak hold signal input of the light amount signal

 

 

 

 

45

BOTM

I

Bottom hold signal input of the light amount signal

 

 

 

 

46

ABCD

I

Light amount signal input

— 32 —

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Sony MX-E500 Xtest, MIFVSS3, Set Key, Rec Key, Avss, Vdiosc, Osci, Osco, Vsiosc, Vrefl, Vrefr, Davss, Asyo, Asyi, Avdd
Page 25 Page 27

MX-E500 specifications

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In summary, the Sony MX-E500 is not just an audio system, but a versatile entertainment hub that combines advanced technology with high-quality sound performance. With its multi-connectivity options, customizable sound features, and elegant design, it stands as a prime choice for anyone looking to enhance their music experience at home or during gatherings.
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