• DIGITAL BOARD IC1503 AK4527 (A/D, D/A CONVERTER)
Pin No. |
| Pin Name | I/O |
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1 |
| SDOS | I | Data source select terminal | “L”: internal ADC output “H”: DAUX input | ||
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2 |
| I2C | I | Control mode select terminal | “L”: | ||
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3 |
| SMUTE | I | Soft mute signal input from the system controller (IC1201) | |||
4 |
| BCLK | I | Audio serial data clock signal input from the digital audio interface receiver (IC1101) | |||
5 |
| LRCK | I | Input channel clock signal input from the digital audio interface receiver (IC1101) | |||
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6 |
| SDT1 | I | DAC1 audio serial data input from the audio DSP (IC1401) | |||
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7 |
| SDT2 | I | DAC2 audio serial data input from the audio DSP (IC1401) | |||
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8 |
| SDT3 | I | DAC3 audio serial data input from the audio DSP (IC1401) | |||
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9 |
| SDTO | O | audio serial data output to the dolby digital audio decoder (IC1301) | |||
10 |
| DAUX | I | Audio serial data input terminal | Not used (fixed at “L”) | ||
11 |
| DFS | I | Double speed sampling mode signal input from the system controller (IC1201) | |||
| “L”: normal speed “H”: double speed | ||||||
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12, 13 | DEM1, DEM0 | I | |||||
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14 |
| TVDD | — | Power supply terminal (+5V) (for output buffer ) | |||
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15 |
| D5V | — | Power supply terminal (+5V) (digital system) | |||
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16 |
| DGND | — | Ground terminal (digital system) |
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17 |
| PD | I | Power down and reset signal input terminal “L”: power down and reset | |||
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18 |
| ICKS2 | I | Clock select 2 input terminal (fixed at “L” in this set) | |||
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19 |
| ICKS1 | I | Clock select 1 input terminal (fixed at “H” in this set) | |||
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20 |
| ICKS0 | I | Clock select 0 input terminal (fixed at “H” in this set) | |||
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21 |
| CAD1 | I | Chip address 1 input terminal | Used during the serial control mode (fixed at “L” in this set) | ||
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22 |
| CAD0 | I | Chip address 0 input terminal | Used during the serial control mode (fixed at “L” in this set) | ||
23 |
| LOUT3 | O | ||||
24 |
| ROUT3 | O | ||||
25 |
| LOUT2 | O | ||||
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26 |
| ROUT2 | O | ||||
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27 |
| LOUT1 | O | ||||
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28 |
| ROUT1 | O | ||||
29 |
| LIN– | I | ||||
30 |
| LIN+ | I | ||||
31 |
| RIN– | I | ||||
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32 |
| RIN+ | I | ||||
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33 |
| DZF2 | O | Zero input detect 2 terminal | Not used (open) | ||
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34 |
| VCOM | O | Common voltage output terminal |
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| Large external capacitor is used to reduce power supply noise | ||||||
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35 |
| VREFH | I | Positive voltage reference input terminal (+5V) | |||
36 |
| A5V | — | Power supply terminal (+5V) (analog system) | |||
37 |
| AGND | — | Ground terminal (analog system) |
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38 |
| DZF1 | O | Zero input detect 1 terminal | Not used (open) | ||
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39 |
| MCLKI | I | Master clock input from the digital audio interface receiver (IC1101) | |||
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40 |
| S/P | I | Parallel or serial select terminal | “L”: serial control mode (fixed at “L” in this set) | ||
41 |
| CS | I | Chip select signal input from the system controller (IC1201) | |||
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42 |
| CCLK | I | Clock signal input from the system controller (IC1201) | |||
43 |
| CDTI | I | Control signal output to the system controller (IC1201) | |||
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44 |
| LOOP1 | O | Loop back mode 1 signal output terminal (fixed at “L” in this set) | |||
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53