Table 4-2 DMA Channels
Controller Channel Address Function1 0 0087 Sp are
1 1 0083 Sp are
1 2 0081 Dis kette
1 3 0082 Sp are
2 4 Cascade Cascade
2 5 008B Sp are
2 6 0089 Sp are
2 7 008A Sp are
Table 4-3 IRQ Interrupt Levels
Priority InterruptNumber Interrupt Source1 SMI Power management unit
2 NMI Parity Error Detected, I/O Channel Error
3 IRQ0 Interval Timer, Counter 0 Output
4 IRQ1 Keyboard
IRQ 2 Interrupt from controller 2 (cascade)
5 IRQ8 Real Time Clock
6 IRQ 9 Cascaded to INT 0AH (IRQ 2)
7 IRQ10 Reserved
8 IRQ 11 Reserved
9 IRQ 12 PS/2 Mouse
10 IRQ13 INT from Coprocessor
11 IRQ14 Hard Disk Controller
12 IRQ15 Reserved
13 IRQ3 Serial Comm Port 2
14 IRQ4 Serial Comm Port 1
15 IRQ5 Reserved
16 IRQ6 Diskette Controller
4-4 Theory of Operation