4-4 Theory of Operation
Controller (206) into a single 208 QFP package.
Major features of the System Logic Controller include:
System:
Fully compatible with IBM PC/AT
Supports PCI Bus-Master mode
System Operation Voltage from 3V to 5.5V
Three programmable non cacheable regions
Flash ROM Boot block erase protection
Supports general purpose I/O
Hybrid Voltage
Integration:
Built-in 206
Built-in 146818A
Built-in Memory Controller
Memory Controller:
Supports ROM DOS up to 64 MB by XIP, 16 MB by EMS
Supports Shadow RAM from C0000-FFFFF
Supports SLOW and SELF Refresh DRAM
Supports Stagger Refresh
On-board memory up to 48 MB
Supports Three Memory Banks
Supports Page Mode/Burst mode operation
Supports 512 KB x 8, 1M x 4, 1M x 16, 2M x 8 and 4M x 4 type DRAM
Supports 8- or 16-bit ROM configuration
Programmable DRAM timing for each bank
Power Management:
Supports up to Ten Programmable PMC Outputs
Supports Multiple Power Saving Mode
Full On Mode