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Texas Instruments manual CDCM7005 Functional Block Diagram, ⎟ ⎟ ⎟ ⎟ ⎟ 6 ⎟, ⎟ 4 o, P Divider

Models: CDCM7005

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CDCM7005 Functional Block Diagram

1.1 CDCM7005 Functional Block Diagram

		VCC	AVCC
		Selected REF Signal
REF_SEL	Manual &
REF_SEL	Automatic	freq. detect
	CLK Select	> 2 MHz
			freq. detect
			> 2 MHz
PRI_REF		MUXREF
	LVCMOS	MUXREF	Progr. Delay
	LVCMOS	Reference	M
			M

SEC_REF		Clock
SEC_REF

	Feedback	Progr. Delay
	Clock	N
CTRL_LE	SPI LOGIC
CTRL_DATA
CTRL_CLK		PECL
		PECL
		to
		LVCMOS
PD
RESET or		FB_MUX
RESET or
HOLD

VCC_CP

				STATUS_REF /
				PRI_SEC_CLK
				STATUS_VCXO
				/ I_REF_CP
				PLL_LOCK
		LOCK	HOLD
Progr. Divider
M	210
		PFD	Charge	CP_OUT
Progr. Divider		PFD	Pump	CP_OUT
Progr. Divider			Pump
N	212
				Current
				Reference
				LV
				CMOS
		Y0 MUX		Y0A
				LV
				PECL
				Y0B
				Y0B
				LV
				CMOS
				LV
				CMOS
				Y1A

VCXO_IN PECL

VCXO_IN INPUT

⎟ 1

⎟ 2

⎟ 3

⎟ 4

⎟ 6 ⎟ 8

⎟ 16
⎟ 4o90
⎟ 8	90o

P16−Div

P Divider

	Y1MUX	LV
		PECL
		Y1B
		Y1B
		LV
		CMOS
		LV
		CMOS
	Y2 MUX	Y2A
		LV
		PECL
		Y2B
		Y2B
		LV
		CMOS
		LV
		CMOS
	Y3 MUX	Y3A
		LV
		PECL
		Y3B
		Y3B
		LV
		CMOS

	VBB	Bias Generator
	VBB	VCC − 1.3 V
		VCC − 1.3 V

		LV
		CMOS
	Y4 MUX	Y4A
		LV
		PECL
		Y4B
		Y4B
		LV
		CMOS

GND

1-2

Page 9

Image 9

Texas Instruments manual CDCM7005 Functional Block Diagram, ⎟ ⎟ ⎟ ⎟ ⎟ 6 ⎟, ⎟ 4 o, P Divider, VCC − 1.3

Contents

CDCM7005 QFN Package Evaluation Module Manual User’s GuideHPA/High Speed Communications 2005IMPORTANT NOTICE ProductsApplications EVM IMPORTANT NOTICE EVM WARNINGS AND RESTRICTIONS Read This First CDCM7005 Data Sheet, SCAS793, Texas InstrumentsHow to Use This Manual Preface6 Parts List, Board Layouts, and Schematics Contents1 Introduction 2 Quick StartFigures Tables3−1 Filter Configurations Chapter IntroductionTopic PageCDCM7005 Functional Block Diagram 1.1 CDCM7005 Functional Block Diagram⎟ ⎟ ⎟ ⎟ ⎟ 6 ⎟ ⎟ 4 oChapter Quick StartPage EVM HardwareTopic Chapter3.2 Hardware Configuration 3.1 Board View and Connector Location3.2.1 Power Supply P1, P2 3.2.2 Onboard Switches and Indicators SW1−SW2, D1−D43.2.3 Programming Interfaces J30, J31 Table 3−1. Filter Configurations3.2.4 Loop Filter J32−J34 Default setting Passive Loop Filter3.2.7 AC-Coupling at PRIREF C1, R4, R6 and SECREF C5, R13, R15 3.2.6 VCXO Inputs and Outputs J16−J18Chapter Serial Peripheral Interface SPI SoftwarePage TopicFollow the steps below in order to install the SPI control software 4.2 Software Installation4.1 Functional Description Figure 4−1. Screen ViewThis chapter discusses the application circuit diagram Application Circuit DiagramChapter Topic5.1 Application Circuit Diagram Figure 5−1. CDCM7005 With a Passive Loop Filter Configuration5.1.1 Passive Loop Filter Figure 5−2. CDCM7005 With a External Active Loop Filter Using OPA341 5.1.2 External Active Loop Filter Using OPA341Application Circuit Diagram Application Circuit DiagramParts List Parts List, Board Layout, and SchematicsSchematics ChapterParts List Parts ListFootprint Part NumberParts List, Board Layout, and Schematics Parts ListFootprint Part NumberFootprint Parts ListPart Number DesignatorFigure 6−1. Component View and Silkscreen Top View 6.2 Board LayoutParts List Parts List, Board Layout, and SchematicsParts List Figure 6−2. Component View and Silkscreen Bottom ViewFigure 6−3. Top Layer View Parts ListParts List, Board Layout, and Schematics Parts List Figure 6−4. Bottom Layer ViewFigure 6−5. Ground Plane View Parts ListParts List, Board Layout, and Schematics 6.3 Schematics Figure 6−6. Power Layer ViewParts List Parts List, Board Layout, and Schematics ve RParts List6-11 ModuleList CDCM7005EVMQFN−SCHCDCM7005QFN Evaluation Module Passive Filter Default Setting short pin 1 & 3 on J3 2, J33 SchematicsParts PartsListList CDCM7005QFN Evaluation ModuleCDCM7005EVMQFN−SCH A Parts List, Board Layout, and Schematics CDCM7005QFN Evaluation ModuleCDCM7005EVMQFN−SCH

CDCM7005 Functional Block Diagram

1.1 CDCM7005 Functional Block Diagram

⎟ 1

⎟ 4o90

P Divider

VCC − 1.3 V